Cyclone III DSP Solutions—An Unprecedented Combination of Power, Functionality, and Cost
In digital signal processing (DSP) applications, Cyclone® III FPGAs provide an unprecedented combination of low power consumption, impressive DSP functionality, and low cost.
You can use Cyclone III FPGAs alone or as DSP coprocessors to improve price-to-performance ratios for DSP applications including video and image processing, wireless communications systems, and common DSP functions.
Digital Subscriber Line Access Multiplexer (DSLAM) Systems
Wireless LAN Access Point
Military, Industrial & Medical
Satellite Radio Receiver
Hybrid Television Receiver
Software Defined Radio
Medical Imaging (e.g., MRI, X-ray)
Network Test Equipment
Learn more about how Cyclone III FPGAs can fit into your applications.
Embedded Multiplier Details
The embedded multipliers in Cyclone III FPGAs are capable of implementing the simple multiplication operation commonly used in typical DSP functions. Cyclone III devices offer up to 288 embedded multiplier blocks and support the following modes: one individual 18-bit ×18-bit multiplier per block, or two individual 9-bit × 9-bit multipliers per block (Figure 1). Multipliers can be cascaded to support wider bit widths. The Quartus II software includes megafunctions that control the mode of operation of the embedded multiplier blocks based on user parameter settings. Multipliers can also be inferred directly from VHDL or Verilog source code.
The embedded multiplier supports both signed and unsigned multiplication. It also offers optional input and output registers for increased performance.
The embedded multipliers are also seamlessly integrated with the embedded memory blocks in Cyclone III FPGAs. This provides an efficient implementation of DSP algorithms that uses both multiplication and memory operations, such as FIR filters and video processing. Table 3 shows the number of multipliers available in Cyclone III FPGAs.
Table 3. Number of Multipliers Available in Cyclone III Devices (1), (2)
18-Bit x18-Bit Multipliers
9-Bit x 9-Bit Multipliers
The number of multipliers in the two columns is not additive (that is, the EP3C5 device offers 23 18-bit x 18-bit multipliers or 46 9-bit x 9-bit multipliers, but not both).
Multipliers are cascaded automatically by the Quartus II software and third-party synthesis software to support wider bit-width multiplications.
Embedded Multiplier Performance
Capable of running in parallel at 260 MHz, the embedded multipliers in Cyclone III devices eliminate the performance bottleneck in complex arithmetic calculations and increase overall DSP system throughput by orders of magnitude. Cyclone III devices can be used as FPGA coprocessors for DSP applications that offload complex arithmetic computations from the DSP processor and boost overall system performance for lower system costs.