Intel® FPGAs and Programmable Devices / FPGAs / Arria Series / Arria V / Arria® V FPGAs Support

Arria® V FPGAs Support

  • Arria V I/O Timing Spreadsheet
  • Arria V Device Design Guidelines (PDF)
  • Arria V Errata (PDF)
  • Arria V GZ Errata (PDF)
  • Arria V ES Errata and Guidelines (PDF)
  • Known Arria V Issues
  • All Packaging Specifications and Dimensions
  • Arria V GZ Device Family Pin Connection Guidelines (PDF)
  • Arria V GT, GX, ST, and SX Device Family Pin Connection Guidelines (PDF)
  • Device Pin-Outs
  • BSDL Files
  • Board Design Guidelines
Arria V SoC Documentation Support

QUICK LINKS

  • Arria V Device Overview
  • Arria V Device Datasheet
  • Documentation: Pin-Out Files for Intel FPGA Devices

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Document PDF Published Date Filter Doc Type Filter Collections Filter
AN 866: Mitigating and Debugging Single Event Upsets in Intel Quartus Prime Standard Edition 2021-01-05 altera:document-type/app-notes altera:development-software
Advanced Link Analyzer User Guide 2020-12-16 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Arria V Device Overview 2020-11-20 altera:document-type/device-overview altera:collection/data-sheet,altera:content-area/recommended-documents
Arria V GZ Avalon-ST Interface for PCIe Solutions: User Guide 2020-12-21 altera:document-type/user-guide altera:intellectual-property
Avalon Interface Specifications 2020-12-21 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/reference-manual,altera:document-type/user-guide altera:intellectual-property
Avalon Verification IP Suite: User Guide 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/reference-manual,altera:document-type/user-guide altera:intellectual-property
CPRI Intel FPGA IP User Guide 2020-10-27 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
DisplayPort Intel FPGA IP User Guide 2021-01-20 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Embedded Peripherals IP User Guide 2020-12-23 altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property,altera:development-software
Ethernet Design Example Components User Guide 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
FIFO Intel FPGA IP User Guide 2020-12-14 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
HDMI Intel FPGA IP User Guide 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Intel FPGA Software Installation and Licensing 2020-12-14 altera:document-type/reference-manual,altera:document-type/user-guide altera:development-software
Intel Quartus Prime Pro Edition: Version 20.4 Software and Device Support Release Notes 2020-12-14 altera:document-type/release-notes altera:development-software
Intel Quartus Prime Standard Edition: Version 20.1 Software and Device Support Release Notes 2020-11-23 altera:document-type/release-notes altera:development-software
Introduction to Intel FPGA IP Cores 2020-11-09 altera:document-type/user-guide altera:intellectual-property,altera:development-software
Low Latency Ethernet 10G MAC Intel FPGA IP User Guide 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Nios II Software Developer Handbook 2020-12-14 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property,altera:development-software
Parallel Flash Loader Intel FPGA IP User Guide 2021-01-19 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Triple-Speed Ethernet Intel FPGA IP User Guide 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Turbo Intel FPGA IP User Guide 2020-12-14 altera:document-type/user-guide altera:intellectual-property
Video and Image Processing Suite User Guide 2020-12-12 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Virtual JTAG Intel FPGA IP Core User Guide 2020-12-01 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
10-Gbps Ethernet (10GbE) MAC IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
100G Interlaken IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
10GBASE-R PHY IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
1G/10GbE and Backplane Ethernet 10GBASE-KR PHY IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
40- and 100-Gbps Ethernet MAC and PHY IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
50G Interlaken IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
ALTDQ_DQS2 IP Core User Guide 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide
ALTERA_CORDIC IP Core User Guide 2017-05-08 altera:document-type/user-guide altera:intellectual-property
AN 496: Using the Internal Oscillator IP Core 2017-11-06 altera:content-area/clocking altera:document-type/app-notes altera:intellectual-property
AN 696: Using the JESD204B MegaCore Function in Arria V Devices 2015-05-11 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 735: Altera Low Latency Ethernet 10G MAC IP Core Migration Guidelines 2015-05-04 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes
AN 736: Nios II Processor Booting From Altera Serial Flash (EPCQ) 2016-05-20 altera:document-type/app-notes
AN 755: Implementing JESD204B IP Core System Reference Design with ARM HPS As Control Unit (Baremetal Flow) 2015-12-30 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 831: Intel FPGA SDK for OpenCL Host Pipelined Multithread 2017-11-20 altera:content-area/development-kits altera:document-type/app-notes altera:development-software
AN647: Single-Port Triple Speed Ethernet and On-Board PHY Chip Reference Design 2015-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN752: Guidelines for Handling Altera Wafer Level Chip Scale Package (WLCSP) 2015-11-02 altera:content-area/pcb-layout-and-packaging altera:document-type/app-notes
Altera 1588 System Solution 2016-01-28 altera:document-type/app-notes,altera:document-type/design-guides altera:intellectual-property
Altera JESD204B IP Core and ADI AD9250 Hardware Checkout Report 2015-06-25 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
Altera Phase-Locked Loop (Altera PLL) IP Core User Guide 2017-06-16 altera:content-area/clocking altera:document-type/user-guide altera:intellectual-property
Arria V Avalon-ST Interface for PCIe Solutions User Guide 2017-05-12 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Arria V GZ Avalon-MM Interface for PCIe Solutions User Guide 2017-05-21 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Arria V GZ Hard IP for PCI Express IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Arria V Hard IP for PCI Express IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Configuring Altera FPGAs 2014-12-15 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Double Data Rate I/O (ALTDDIO_IN, ALTDDIO_OUT, and ALTDDIO_BIDIR) IP Cores User Guide 2017-06-19 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Fixed-Point IP Cores (ALTERA_FIXED-POINT_FUNCTIONS) User Guide 2017-03-31 altera:document-type/user-guide altera:intellectual-property
High-speed Reed-Solomon IP Core Release Notes 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/release-notes altera:intellectual-property
Implementing 9.8 Gbps CPRI in Arria V GT and ST Devices 2013-12-06 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes
Intel Quartus Prime Standard Edition Handbook Volume 2 Design Implementation and Optimization 2017-11-06 altera:document-type/user-guide altera:development-software
LDPC IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Nios II Embedded Design Suite Release Notes 2015-06-17 altera:document-type/release-notes,altera:document-type/design-guides
Nios II Floating Point Hardware 2 Component User Guide altera:document-type/design-guides,altera:document-type/user-guide
Nios II Gen2 Migration Guide 2015-06-12 altera:document-type/app-notes,altera:document-type/design-guides
PCB Stackup Design Considerations for Intel FPGAs 2017-06-28 altera:content-area/pcb-layout-and-packaging altera:document-type/app-notes
PCI Express Avalon -MM DMA Reference Design 2017-05-08 altera:document-type/app-notes
PCI Express DMA Reference Design Using External Memory 2017-05-17 altera:content-area/external-memory-interface,altera:content-area/development-kits altera:document-type/app-notes,altera:document-type/reference-design altera:intellectual-property
PowerPlay Early Power Estimator User Guide 2017-02-21 altera:content-area/power-and-thermal-management altera:document-type/user-guide altera:content-area/recommended-documents,altera:development-software
SDI Audio IP Cores Release Notes 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
SerialLite II IP Core Release Notes 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
Timing Analyzer Quick-Start Tutorial Intel Quartus Prime Pro Edition 2017-12-01 altera:content-area/clocking altera:document-type/user-guide altera:development-software
Using the Altera PDN Tool to Optimize Your Power Delivery Network Design 2015-07-08 altera:content-area/power-and-thermal-management altera:document-type/app-notes
Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone V Devices 2015-12-04 altera:document-type/app-notes
Viterbi IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
XAUI PHY Release Notes 2017-05-08 altera:document-type/release-notes altera:intellectual-property
ALTIOBUF IP Core User Guide 2020-01-13 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
AN 522: Implementing Bus LVDS Interface in Supported Intel FPGA Device Families 2018-07-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes
AN 539: Test Methodology of Error Detection and Recovery using CRC in Intel FPGA Devices 2019-08-09 altera:document-type/app-notes
AN 556: Using the Design Security Features in Intel FPGAs 2019-11-12 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/app-notes
AN 661: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig IP Cores 2019-10-14 altera:content-area/clocking altera:document-type/app-notes altera:intellectual-property
AN 720: Simulating the ASMI Block in Your Design 2020-07-29 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 745: Design Guidelines for DisplayPort Intel FPGA IP Interface 2020-04-13 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 796: Cyclone V and Arria V SoC Device Design Guidelines 2020-07-27 altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/development-kits altera:document-type/app-notes altera:intellectual-property,altera:content-area/recommended-documents,altera:development-software
AN 812: Platform Designer System Design Tutorial 2018-04-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes,altera:document-type/reference-design altera:intellectual-property,altera:development-software
AN 829: PCI Express Avalon -MM DMA Reference Design 2018-06-11 altera:content-area/development-kits altera:document-type/app-notes altera:intellectual-property
AN 834: Using the Intel HLS Compiler Pro Edition with an IDE 2020-05-29 altera:document-type/app-notes altera:development-software
AN 837: Design Guidelines for HDMI Intel FPGA IP 2019-01-28 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 856: K-Mean Clustering with the Intel FPGA SDK for OpenCL 2018-06-12 altera:content-area/development-kits altera:document-type/app-notes altera:development-software
AN 918: Using the Intel HLS Compiler Standard Edition with an IDE 2020-05-29 altera:document-type/app-notes altera:development-software
ASMI Parallel II Intel FPGA IP User Guide 2020-07-29 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide altera:intellectual-property
ASMI Parallel Intel FPGA IP Core User Guide 2019-07-02 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide altera:intellectual-property
Advanced SEU Detection Intel FPGA IP User Guide 2019-03-26 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide altera:intellectual-property
Arria V Avalon-MM Interface for PCIe Solutions User Guide 2017-05-21 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Arria V Avalon-ST Interface for PCIe Solutions User Guide 2019-05-03 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Arria V Device Datasheet 2019-04-26 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/clocking,altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp,altera:content-area/power-and-thermal-management altera:document-type/data-sheets altera:collection/data-sheet,altera:content-area/recommended-documents
Arria V Device Handbook Volume 2: Transceivers 2020-05-29 altera:document-type/user-guide altera:content-area/recommended-documents
Arria V Device Handbook: Volume 1: Device Interfaces and Integration 2020-07-24 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/clocking,altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp,altera:content-area/power-and-thermal-management altera:document-type/user-guide altera:content-area/recommended-documents
BCH Intel FPGA IP: User Guide 2018-11-30 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Battery Management System Reference Design 2016-04-02 altera:document-type/reference-manual altera:development-software
CIC Intel FPGA IP: User Guide 2019-09-30 altera:document-type/user-guide altera:intellectual-property
Chip ID Intel FPGA IP Cores User Guide 2020-10-05 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide altera:intellectual-property
Clock Control Block (ALTCLKCTRL) IP Core Release Notes 2020-09-28 altera:content-area/clocking altera:document-type/release-notes altera:intellectual-property
Configuration via Protocol (CvP) Implementation in V-series FPGA Devices User Guide 2020-09-04 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms 2016-12-13 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/embedded-memory---dsp altera:document-type/app-notes,altera:document-type/design-guides altera:development-software
Customizable Flash Programmer User Guide 2018-11-28 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
DDR2 and DDR3 SDRAM Controller with UniPHY IP Core Release Notes 2019-07-01 altera:content-area/external-memory-interface altera:document-type/release-notes
Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide 2020-10-06 altera:content-area/power-and-thermal-management altera:document-type/user-guide
Embedded Design Handbook 2020-07-22 altera:content-area/embedded-memory---dsp altera:document-type/design-guides,altera:document-type/user-guide altera:development-software
Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT) User Guide 2020-03-11 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Error Message Register Unloader Intel FPGA IP Core User Guide 2018-05-23 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
External Memory Interface Handbook Volume 1: Intel FPGA Memory Solution Overview, Design Flow, and General Information 2017-05-08 altera:content-area/external-memory-interface altera:document-type/reference-manual,altera:document-type/user-guide
External Memory Interface Handbook Volume 2: Design Guidelines 2017-05-08 altera:content-area/external-memory-interface altera:document-type/reference-manual,altera:document-type/user-guide
External Memory Interface Handbook Volume 3: Reference Material 2019-07-24 altera:content-area/external-memory-interface altera:document-type/reference-manual,altera:document-type/user-guide
FFT IP Core: User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Floating-Point IP Cores User Guide 2020-06-22 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Guidelines for Developing a Nios II HAL Device Driver 2015-06-12 altera:document-type/app-notes,altera:document-type/design-guides
High-speed Reed-Solomon IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Intel FPGA Download Cable User Guide 2020-03-11 altera:content-area/development-kits altera:document-type/user-guide
Intel FPGA Integer Arithmetic IP Cores User Guide 2020-10-05 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Intel FPGA SDK for OpenCL Pro Edition: Custom Platform Toolkit User Guide 2020-09-28 altera:document-type/user-guide altera:development-software
Intel FPGA SDK for OpenCL Standard Edition: Custom Platform Toolkit User Guide 2018-09-24 altera:document-type/user-guide altera:development-software
Intel FPGA Software Installation and Licensing Quick Start 2018-11-26 altera:document-type/user-guide altera:development-software
Intel FPGA Temperature Sensor IP Core User Guide 2018-05-30 altera:content-area/power-and-thermal-management altera:document-type/user-guide
Intel High Level Synthesis Compiler Standard Edition: Best Practices Guide 2019-12-18 altera:document-type/user-guide altera:development-software
Intel High Level Synthesis Compiler Standard Edition: Getting Started Guide 2020-03-26 altera:document-type/user-guide altera:development-software
Intel High Level Synthesis Compiler Standard Edition: Reference Manual 2019-12-18 altera:document-type/reference-manual,altera:document-type/user-guide altera:development-software
Intel High Level Synthesis Compiler Standard Edition: User Guide 2019-12-18 altera:document-type/user-guide altera:development-software
Intel High Level Synthesis Compiler Standard Edition: Version 19.1 Release Notes 2019-03-26 altera:document-type/release-notes altera:development-software
Intel Quartus Prime Design Suite Version 18.1 Update Release Notes 2019-04-17 altera:document-type/release-notes altera:intellectual-property,altera:development-software
Intel Quartus Prime Pro Edition User Guide: Debug Tools 2020-09-28 altera:document-type/user-guide altera:development-software
Intel Quartus Prime Standard Edition Handbook Volume 1 Design and Synthesis 2018-05-09 altera:document-type/user-guide altera:development-software
Intel Quartus Prime Standard Edition Handbook Volume 3 Verification 2018-05-09 altera:document-type/user-guide altera:development-software
Intel Quartus Prime Standard Edition User Guide: Getting Started 2019-12-16 altera:document-type/user-guide altera:development-software
Intel Quartus Prime Timing Analyzer Cookbook 2018-11-12 altera:document-type/user-guide altera:development-software
JESD204B IP Core Design Example User Guide 2017-11-06 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
JESD204B Intel FPGA IP Release Notes 2019-12-16 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
JESD204B Intel FPGA IP User Guide 2020-09-10 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
LVDS SERDES Transmitter / Receiver IP Cores User Guide 2017-12-15 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Low Latency Ethernet 10G MAC Intel FPGA IP Release Notes 2019-10-02 altera:document-type/release-notes altera:intellectual-property
ModelSim - Intel FPGA Edition Simulation Quick-Start: Intel Quartus Prime Standard Edition 2019-12-30 altera:document-type/user-guide altera:development-software
NCO IP Core: User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Nios II Classic Processor Reference Guide 2016-10-28 altera:document-type/user-guide altera:intellectual-property
Nios II Custom Instruction User Guide 2020-04-27 altera:document-type/user-guide altera:intellectual-property,altera:development-software
Nios II Performance Benchmarks 2020-05-14 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Nios II Processor Reference Guide 2020-10-22 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:development-software
PCI Express High Performance Reference Design 2018-12-12 altera:document-type/app-notes altera:intellectual-property
QDR II and QDR II+ SRAM Controller with UniPHY IP Core Release Notes 2019-07-01 altera:content-area/external-memory-interface altera:document-type/release-notes
RLDRAM II Controller with UniPHY and RLDRAM 3 PHY-Only IP Core Release Notes 2019-07-01 altera:content-area/external-memory-interface altera:document-type/release-notes
RapidIO II Intel FPGA IP Release Notes 2020-09-28 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
RapidIO II Intel FPGA IP User Guide 2020-09-28 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide
RapidIO Intel FPGA IP Core Release Notes 2020-09-28 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
RapidIO Intel FPGA IP User Guide 2020-09-28 altera:document-type/user-guide altera:intellectual-property
Reed-Solomon II IP Core User Guide 2016-05-02 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Remote Update Intel FPGA IP Core Release Notes 2018-05-07 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/release-notes
Remote Update Intel FPGA IP User Guide 2020-02-11 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
SDI Audio Intel FPGA IP User Guide 2020-10-05 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
SDI II Intel FPGA IP User Guide 2020-10-01 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
SDI IP Core User Guide 2020-08-20 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Serial Digital Interface (SDI) IP Core Release Notes 2020-08-20 altera:document-type/release-notes altera:intellectual-property
Serial Lite III Streaming Intel FPGA IP Core Release Notes 2018-09-24 altera:document-type/release-notes altera:intellectual-property
Serial Lite III Streaming Intel FPGA IP Core User Guide 2020-07-10 altera:document-type/user-guide altera:intellectual-property
SerialLite II IP Core User Guide 2019-01-09 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Unique Chip ID Intel FPGA IP Core Release Notes 2018-05-07 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/release-notes
V-Series Avalon-MM DMA Interface for PCIe Solutions User Guide 2018-07-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
V-Series Transceiver PHY IP Core User Guide 2020-06-02 altera:document-type/user-guide
Video and Image Processing Suite Release Notes 2019-04-15 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
External Memory Interfaces
  • Using External Memory Interfaces to Achieve Efficient High-Speed Memory Solutions
Power and Thermal Management
  • Arria II and Arria V PowerPlay Early Power Estimator 
    PowerPlay Early Power Estimator User Guide
  • An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28 nm FPGAs 
  • AN657: Thermal Management and Mechanical Handling for Altera TCFCBGA Devices 
  • Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide
    Power Delivery Network (PDN) Tool 2.0 for Stratix V, Arria V, Arria II GZ, Cyclone V, and Cyclone IV Devices 
    Power Delivery Network (PDN) Tool 2.0 for Arria 10 Devices 
  • Meeting the Low Power Imperative at 28 nm 
I/O Interfaces, Protocols and Signal Integrity
  • AN 456: PCI Express High Performance Reference Design
  • AN 696: Using the JESD204B MegaCore Function in Arria V Devices
  • Altera JESD204B MegaCore Function and ADI AD9250 Hardware Checkout Report
    AN 696 Reference Design Example (3 MB)
  • Arria V Avalon-MM Interface for PCIe Solutions User Guide
  • Arria V Avalon-ST Interface for PCIe Solutions User Guide
  • Arria V Hard IP for PCI Express User Guide
  • AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs
  • AN 668: Serial Digital Interface Reference Design for Stratix V GX and Arria V GX Devices
    Arria V GX Design Files (2 MB)
    Stratix V GX Design Files (1 MB)
  • AN 702: Interfacing a USB PHY to the Hard Processor System USB 2.0 OTG Controller
  • AN653: Implementing the CPRI Protocol using the Deterministic Latency Transceiver PHY IP Core
    AN653_Reference_Design_File (346 KB)
  • Arria V GZ Avalon-MM Interface for PCIe Solutions User Guide
  • Arria V GZ Avalon-ST Interface for PCIe Solutions User Guide
  • Early SSN Estimator User Guide for Altera Programmable Devices
    Arria V Early SSN Estimator (528 KB)
  • V-Series Avalon-MM DMA Interface for PCIe Solutions User Guide
DSP
  • Altera Product Catalog 
  • Altera's 28 nm Device Portfolio 
Device Configuration and Remote System Upgrades
  • Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide
    user_led.zip (4 KB)
Design Guidelines
  • AN 652: Arria V Timing Optimization Guidelines
  • Achieving SerDes Interoperability on Altera's 28 nm FPGAs Using Introspect ESP 
  • AN 662: Arria V and Cyclone V Design Guidelines
  • AN 676: Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone V Devices
    AN 676 Reference Design Example (1 MB)
  • An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28 nm FPGAs 
  • Low-Cost Implementation of High-Performance PCIe Gen2 Hard IP 
  • Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach 
  • Tips and Techniques for 28-nm Design Optimization 
PCB Layout and Packaging
  • AN659: Thermal Management and Mechanical Handling for Lidless Flip Chip Ball-Grid Array
  • AN657: Thermal Management and Mechanical Handling for Altera TCFCBGA Devices
Development Kits
  • Altera Product Catalog 
  • Arria V GT FPGA Development Board Reference Manual
  • Arria V GT FPGA Development Kit User Guide
  • Arria V GX FPGA Development Board Reference Manual
  • Arria V GX FPGA Development Kit User Guide
  • Arria V GX Starter Board Reference Manual
  • Arria V GX Starter Kit User Guide
End Applications
  • AN 717: Nios II Gen2 Hardware Development Tutorial
  • A Validated Methodology for Designing Safe Industrial Systems on a Chip 
  • Altera and Escape Communications' Microwave Modem Solution 
  • Altera's 28 nm Device Portfolio 
  • AN 425: Using the Command-Line Jam STAPL Solution for Device Programming
  • Broadcast Design Solutions from Altera 
  • Optimize Motor Control Designs with an Integrated FPGA Design Flow 
  • OTN Family | 200G P-OTS Any-Rate Mapper | TPOC226 (SoftSilicon function)
  • OTN Family | 400G Transponder / Muxponder | TPO516 (SoftSilicon function)
  • Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach 
General Device Documentation
  • Altera QAM Design Solution for HD Video 
  • Designing Polyphase DPD Solutions with 28-nm FPGAs 
  • FPGA-Adaptive Software Debug and Performance Analysis 
  • Implementing Efficient Low-Power PCIe Interfaces with Low-Cost FPGAs 
  • Industrial Motor Drive on a Single FPGA 
  • Jump-Start Software Development with the SoC FPGA Virtual Target 
  • Low-Cost Implementation of High-Performance PCIe Gen2 Hard IP 
  • Optimize Power and Cost with Altera’s Diversified 28-nm Device Portfolio 
  • Robust Image Format Conversion Solutions