Arria 10 SoC Device Documentation Support
Document PDF Published Date
25G Ethernet Intel FPGA IP Release Notes 2019-04-05
50G Ethernet Design Example User Guide 2019-04-03
AN 370: Using the Intel FPGA Serial Flash Loader with the Intel Quartus Prime Software 2019-02-18
AN 692: Power Sequencing Considerations for Intel Cyclone 10 GX, Intel Arria 10, and Intel Stratix 10 Devices 2019-03-05
AN 728: I/O PLL Reconfiguration and Dynamic Phase Shift for Intel Arria 10 and Intel Cyclone 10 GX Devices 2019-04-03
AN 837: Design Guidelines for HDMI Intel FPGA IP 2019-01-28
AN 839: Design Block Reuse Tutorial: for Intel Arria 10 FPGA Development Board 2019-04-11
Accelerator Functional Unit (AFU) Developer’s Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-04-09
Advanced SEU Detection Intel FPGA IP User Guide 2019-03-26
Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide 2019-04-12
Avalon Verification IP Suite: User Guide 2019-04-03
CPRI v7.0 IP Core User Guide 2019-02-06
Chip ID Intel FPGA IP Cores User Guide 2019-02-19
DisplayPort Intel Arria 10 FPGA IP Design Example User Guide 2019-04-05
DisplayPort Intel FPGA IP User Guide 2019-04-01
Drive-On-Chip Reference Design 2019-04-18
Embedded Peripherals IP User Guide 2019-04-01
External Memory Interfaces Intel Arria 10 FPGA IP User Guide 2019-04-01
GPIO Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2019-03-04
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Version 1.2 Release Notes 2019-03-08
Intel Arria 10 Avalon-ST Interface with SR-IOV PCIe Solutions User Guide 2019-04-08
Intel Arria 10 Core Fabric and General Purpose I/Os Handbook 2019-03-28
Intel Arria 10 Transceiver PHY User Guide 2019-01-30
Intel FPGA SDK for OpenCL: Intel Arria 10 GX FPGA Development Kit Reference Platform Porting Guide 2019-04-18
Intel FPGA SDK for OpenCL: Intel Arria 10 SoC Development Kit Reference Platform Porting Guide 2019-04-01
Intel FPGA Software Installation and Licensing 2019-04-01
Intel FPGA USB Download Cable User Guide 2019-04-12
Intel High Level Synthesis Accelerator Functional Unit Design Example User Guide 2019-03-12
Intel High Level Synthesis Compiler: Best Practices Guide 2019-04-01
Intel High Level Synthesis Compiler: Getting Started Guide 2019-04-01
Intel High Level Synthesis Compiler: Reference Manual 2019-04-01
Intel High Level Synthesis Compiler: User Guide 2019-04-01
Intel High Level Synthesis Compiler: Version 19.1 Release Notes 2019-04-01
Intel Quartus Prime Design Suite Version 18.1 Update Release Notes 2019-04-17
Intel Quartus Prime Pro Edition: Version 19.1 Software and Device Support Release Notes 2019-04-17
Intel SoC FPGA Embedded Development Suite (SoC EDS) Release Notes 2019-04-10
JESD204B Intel FPGA IP Release Notes 2019-04-01
JESD204B Intel FPGA IP User Guide 2019-04-01
LVDS SERDES Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2019-01-30
Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example User Guide 2019-04-15
PHY Lite for Parallel Interfaces Intel FPGA IP Core User Guide: Intel Stratix 10, Intel Arria 10, and Intel Cyclone 10 GX Devices 2019-04-04
Parallel Flash Loader Intel FPGA IP Core User Guide 2019-02-19
SDI II Intel FPGA IP User Guide 2019-04-01
Serial Lite III Streaming Intel FPGA IP Core User Guide 2019-02-25
Triple-Speed Ethernet Intel FPGA IP User Guide 2019-03-29
10-Gbps Ethernet (10GbE) MAC IP Core Release Notes 2016-05-02
100G Interlaken IP Core Release Notes 2016-05-02
25G Ethernet Design Example User Guide 2017-11-08
50 Gbps Ethernet IP Core User Guide 2017-11-07
50G Ethernet IP Core Release Notes 2017-05-08
50G Interlaken IP Core Release Notes 2016-05-02
ALTERA_CORDIC IP Core User Guide 2017-05-08
AN 496: Using the Internal Oscillator IP Core 2017-11-06
AN 699: Using the Altera Ethernet Design Toolkit 2016-05-13
AN 701: Scalable Low Latency Ethernet 10G MAC using Intel Arria 10 1G/10G PHY 2017-11-06
AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor 2015-05-04
AN 735: Altera Low Latency Ethernet 10G MAC IP Core Migration Guidelines 2015-05-04
AN 736: Nios II Processor Booting From Altera Serial Flash (EPCQ) 2016-05-20
AN 738: Intel Arria 10 Device Design Guidelines 2017-06-30
AN 742: PMBus SmartVID Controller Reference Designs 2017-05-08
AN 745: Design Guidelines for Intel FPGA DisplayPort Interface 2018-01-22
AN 746: SDI II Triple-Rate Reference Designs for Intel Arria 10 Devices 2017-05-08
AN 747: Implementing PHYLite in Intel Arria 10 Devices Design Examples 2017-05-08
AN 749: Altera JESD204B IP Core and ADI AD9144 Hardware Checkout Report 2015-12-18
AN 753: Altera JESD204B IP Core and ADI AD6676 Hardware Checkout Report 2015-11-02
AN 756: Altera GPIO to Altera PHYLite Design Implementation Guidelines 2017-05-08
AN 768: Multi-Rate (Up to 12G) SDI II Reference Design for Intel Arria 10 Devices 2017-05-08
AN 776: Intel Arria 10 UHD Video Reference Design 2018-01-11
AN 777: Data Word Alignment Calibration With Multiple Intel FPGA PHYLite for Parallel Interfaces IP Cores 2018-01-12
AN 793: Intel Arria 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design 2017-06-13
AN 808: Migration Guidelines from Arria 10 to Stratix 10 for 10G Ethernet Subsystem 2017-06-19
AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design 2018-01-30
AN 824: Intel FPGA SDK for OpenCL Board Support Package Floorplan Optimization Guide 2017-08-08
AN 831: Intel FPGA SDK for OpenCL Host Pipelined Multithread 2017-11-20
AN 838: Interoperability between Intel Arria 10 NBASE-T Ethernet Solution with Aquantia* Ethernet PHY Reference Design 2018-01-12
AN-720: Simulating the ASMI Block in Your Design 2015-08-03
AN-744: Scalable Triple Speed Ethernet Reference Design for Arria 10 Devices 2016-04-27
AN-785: Altera JESD204B IP Core and ADI AD9162 Hardware Checkout Report 2016-12-06
AN647: Single-Port Triple Speed Ethernet and On-Board PHY Chip Reference Design 2015-12-14
AN752: Guidelines for Handling Altera Wafer Level Chip Scale Package (WLCSP) 2015-11-02
AN794: Arria 10 Low Latency Ethernet 10G MAC and XAUI PHY Reference Design 2017-02-01
AN795: Implementing Guidelines for 10G Ethernet Subsystem Using Low Latency 10G MAC IP Core in Arria 10 Devices 2017-02-01
Arria 10 1G/10GbE and 10GBASE-KR PHY IP Core Release Notes 2016-10-31
Arria 10 FPGA Development Kit User Guide 2017-09-21
Arria 10 FPLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver ATX PLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver CMU PLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver Native PHY IP Core Release Notes 2016-10-31
BCH IP Core Release Notes 2017-11-06
CIC IP Core Release Notes 2017-11-06
CIC IP Core User Guide 2017-11-06
Configuring Altera FPGAs 2014-12-15
Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms 2016-12-13
Early Power Estimator for Intel Arria 10 FPGAs User Guide 2016-11-07
Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT) User Guide 2017-11-06
FFT IP Core Release Notes 2017-11-06
FIR II IP Core Release Notes 2017-11-06
Fixed-Point IP Cores (ALTERA_FIXED-POINT_FUNCTIONS) User Guide 2017-03-31
High-speed Reed-Solomon IP Core Release Notes 2017-11-06
Hybrid Memory Cube Controller Design Example User Guide 2016-05-02
Hybrid Memory Cube Controller IP Core Release Notes 2016-05-02
Hybrid Memory Cube Controller IP Core User Guide 2016-05-02
Intel Arria 10 GX/GT Device Errata and Design Recommendations 2017-12-20
Intel Arria 10 Native Fixed Point DSP IP Core User Guide 2016-06-10
Intel Arria 10 Native Floating-Point DSP Intel FPGA IP User Guide 2017-11-06
Intel Arria 10 and Intel Cyclone 10 Avalon -MM Interface for PCIe Design Example User Guide 2017-11-06
Intel Arria 10 and Intel Cyclone 10 Avalon-ST Hard IP for PCIe Design Example User Guide 2017-11-06
Intel FPGA HDMI Design Example User Guide for Intel Arria 10 Devices 2017-11-06
Intel FPGA Integer Arithmetic IP Cores User Guide 2017-11-17
Intel FPGA JESD204B Design Example User Guide for Intel Arria 10 Devices 2017-11-06
Intel FPGA OCT IP Core User Guide 2017-11-06
Intel FPGA Triple Speed Ethernet IP Core Release Notes 2017-11-06
Intel Quartus Prime Standard Edition Handbook Volume 2 Design Implementation and Optimization 2017-11-06
Interlaken IP Core Feature and Interface Differences Between Stratix 10, Arria 10, and Stratix V Devices 2017-06-12
Interlaken PHY IP Core Release Notes 2016-10-31
JESD204B IP Core Design Example User Guide 2017-11-06
LDPC IP Core Release Notes 2017-11-06
LDPC IP Core User Guide 2017-11-06
Low Latency 100-Gbps Ethernet IP Core Release Notes 2017-07-07
Low Latency 100G Ethernet Design Example User Guide 2017-11-08
Low Latency 40- and 100-Gbps Ethernet MAC and PHY IP Core Release Notes 2017-07-08
Low Latency 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide 2017-12-28
Low Latency 40-Gbps Ethernet IP Core Release Notes 2017-07-07
Low Latency 40G Ethernet Example Design User Guide 2017-11-08
NCO IP Core Release Notes 2017-11-06
NCO IP Core User Guide 2017-11-06
Nios II Embedded Design Suite Release Notes 2015-06-17
Nios II Flash Programmer User Guide 2017-11-06
Nios II Floating Point Hardware 2 Component User Guide
Nios II Gen2 Migration Guide 2015-06-12
Other Transceiver IP Cores Product Release Notes 2016-10-31
PCB Stackup Design Considerations for Intel FPGAs 2017-06-28
PCI Express Avalon -MM DMA Reference Design 2017-05-08
PCI Express DMA Reference Design Using External Memory 2017-05-17
PCI Express: Migrating to Intel Stratix 10 Devices for the Avalon Streaming Interface 2017-05-08
PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces 2017-01-23
Partial Reconfiguration Solutions IP User Guide 2017-11-06
Random Number Generator IP Core User Guide
RapidIO IP Core Release Notes 2016-05-02
Reed-Solomon II IP Core Release Notes 2017-11-06
SDI Audio IP Cores Release Notes 2017-05-08
Serial Digital Interface (SDI) IP Core Release Notes 2017-05-08
SerialLite II IP Core Release Notes 2017-05-08
SerialLite III Streaming IP Core Design Example User Guide for Intel Arria 10 Devices 2017-11-06
SmartVID Controller IP Core Release Notes 2017-05-08
SmartVID Controller IP Core User Guide 2017-05-08
Timing Analyzer Quick-Start Tutorial Intel Quartus Prime Pro Edition 2017-12-01
Turbo IP Core Release Notes 2017-11-06
Turbo IP Core User Guide 2015-11-11
Using the Altera PDN Tool to Optimize Your Power Delivery Network Design 2015-07-08
Vision Processing with the Canny Edge Detection Reference Design 2015-02-14
Vision Processing with the Canny Edge Detection Reference Design 2015-02-14
Viterbi IP Core Release Notes 2017-11-06
Viterbi IP Core User Guide 2017-11-06
XAUI PHY Release Notes 2017-05-08
100G Interlaken Design Example User Guide 2018-03-22
100G Interlaken MegaCore Function User Guide 2018-03-05
10Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: For Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-01-02
1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel FPGA IP Release Notes 2018-09-24
25G Ethernet Intel Arria 10 FPGA IP User Guide 2018-10-23
40Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: For Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-01-02
50G Interlaken Design Example User Guide 2018-03-22
5G LDPC Intel FPGA IP User Guide 2018-12-21
AN 307: Intel FPGA Design Flow for Xilinx Users 2018-03-20
AN 522: Implementing Bus LVDS Interface in Supported Intel FPGA Device Families 2018-07-31
AN 556: Using the Design Security Features in Intel FPGAs 2018-12-11
AN 704: FPGA-based Safety Separation Design Flow for Rapid Functional Safety Certification 2018-09-01
AN 711: Power Reduction Features in Intel Arria 10 Devices 2018-07-12
AN 737: SEU Detection and Recovery in Intel Arria 10 Devices 2018-09-04
AN 775: I/O Timing Information Generation Guidelines 2016-10-31
AN 784: Partial Reconfiguration over PCI Express Reference Design for Intel Arria 10 Devices 2018-09-24
AN 797: Partially Reconfiguring a Design on Intel Arria 10 GX FPGA Development Board 2018-09-24
AN 799: Quick Intel Arria 10 Design Debugging Using Signal Probe and Rapid Recompile 2018-08-16
AN 803: Implementing Analog-to-Digital Converter Multi-Link Designs with Intel Arria 10 JESD204B RX IP Core 2018-02-09
AN 806: Hierarchical Partial Reconfiguration Tutorial for Intel Arria 10 GX FPGA Development Board 2018-09-28
AN 807: Configuring the Intel Arria 10 GX FPGA Development Kit for the Intel FPGA SDK for OpenCL 2018-05-04
AN 812: Platform Designer System Design Tutorial 2018-04-02
AN 813: Hierarchical Partial Reconfiguration over PCI Express Reference Design for Arria 10 Devices 2018-09-24
AN 817: Static Update Partial Reconfiguration Tutorial: for Intel Arria 10 GX FPGA Development Board 2018-10-12
AN 829: PCI Express Avalon -MM DMA Reference Design 2018-06-11
AN 834: Developing for the Intel HLS Compiler with an IDE 2017-12-04
AN 845: Signal Tap Tutorial for Intel Arria 10 Partial Reconfiguration Design 2018-10-08
AN 847: Signal Tap Tutorial with Design Block Reuse for Intel Arria 10 FPGA Development Board 2018-05-07
AN 851: Incremental Block-Based Compilation Tutorial: for Intel Arria 10 FPGA Development Board 2018-11-10
AN 856: K-Mean Clustering with the Intel FPGA SDK for OpenCL 2018-06-12
AN 870: Stencil Computation Reference Design 2018-10-10
AN 871: Quick Guide for Intel Arria 10 and Intel Cyclone 10 GX Transceiver High-Speed Link Tuning 2018-09-26
ASMI Parallel II Intel FPGA IP Core Release Notes 2018-05-07
ASMI Parallel II Intel FPGA IP Core User Guide 2018-09-24
ASMI Parallel Intel FPGA IP Core User Guide 2018-05-15
Acceleration Stack for Intel Xeon CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual 2018-12-04
Advanced Link Analyzer User Guide 2018-10-29
Altera Complete Design Suite Version 14.0 Arria 10 Edition Update Release Notes 2014-09-01
Arria 10 GX Transceiver Signal Integrity Development Kit User Guide 2017-08-08
Avalon Interface Specifications 2018-09-26
BCH Intel FPGA IP: User Guide 2018-11-30
Bare Metal User Guide 2015-11-30
Battery Management System Reference Design 2016-04-02
Compiling and Customizing an Intel Arria 10 Custom Platform for OpenCL 2018-10-30
Customizable Flash Programmer User Guide 2018-11-28
DDR2 and DDR3 SDRAM Controller with UniPHY IP Core Release Notes 2018-11-05
DMA Accelerator Functional Unit (AFU) User Guide 2018-12-04
Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide 2018-10-05
Embedded Design Handbook 2018-11-12
Error Message Register Unloader Intel FPGA IP Core User Guide 2018-05-23
Ethernet Design Example Components User Guide 2018-12-03
External Memory Interface Handbook Volume 1: Intel FPGA Memory Solution Overview, Design Flow, and General Information 2017-05-08
External Memory Interface Handbook Volume 2: Design Guidelines 2017-05-08
External Memory Interface Handbook Volume 3: Reference Material 2017-05-08
External Memory Interfaces Intel Arria 10 FPGA IP Core Release Notes 2018-11-05
External Memory Interfaces Intel Arria 10 FPGA IP Design Example User Guide 2018-09-24
FFT IP Core: User Guide 2017-11-06
FIFO Intel FPGA IP User Guide 2018-09-24
FIR II IP Core: User Guide 2017-11-06
Fault Injection Intel FPGA IP Core User Guide 2018-05-16
Floating-Point IP Cores User Guide 2016-12-09
Guidelines for Developing a Nios II HAL Device Driver 2015-06-12
HDMI Intel FPGA IP User Guide 2019-01-21
HDMI Intel Stratix 10 FPGA IP Design Example User Guide 2018-05-07
HSSI User Guide for Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2018-12-04
High-speed Reed-Solomon IP Core User Guide 2017-11-06
IOPLL Intel FPGA IP Core Release Notes 2018-05-07
IOPLL Intel FPGA IP Core User Guide 2019-01-03
IOPLL Reconfig Intel FPGA IP Core Release Notes 2018-05-07
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.0 Errata 2018-06-22
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.1 Errata 2018-08-06
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.1 Release Notes 2018-08-06
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Release Notes 2018-04-11
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Version 1.2 Errata 2018-12-04
Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start User Guide 2018-12-04
Intel Arria 10 Device Datasheet 2018-11-29
Intel Arria 10 Device Overview 2018-12-06
Intel Arria 10 GX, GT, and SX Device Family Pin Connection Guidelines 2018-12-12
Intel Arria 10 and Intel Cyclone 10 GX Avalon -MM Interface for PCI Express User Guide 2018-08-13
Intel Arria 10 and Intel Cyclone 10 GX Avalon -ST Interface for PCI Express User Guide 2018-12-28
Intel Arria 10 and Intel Cyclone 10 GX Hard IP for PCI Express IP Core Release Notes 2018-05-07
Intel Arria 10 or Intel Cyclone 10 GX Avalon -MM DMA Interface for PCI Express Solutions User Guide 2018-08-28
Intel FPGA IP: Release Notes 2018-09-28
Intel FPGA SDK for OpenCL Pro Edition: Custom Platform Toolkit User Guide 2018-10-26
Intel FPGA SDK for OpenCL Standard Edition: Custom Platform Toolkit User Guide 2018-09-24
Intel FPGA Software Installation and Licensing Quick Start 2018-11-26
Intel FPGA Temperature Sensor IP Core User Guide 2018-05-30
Intel FPGA Voltage Sensor IP Core User Guide 2018-02-09
Intel Quartus Prime Standard Edition Handbook Volume 1 Design and Synthesis 2018-05-09
Intel Quartus Prime Standard Edition Handbook Volume 3 Verification 2018-05-09
Intel Quartus Prime Standard Edition: Version 18.1 Software and Device Support Release Notes 2018-09-24
Intel Quartus Prime Timing Analyzer Cookbook 2018-11-12
Low Latency 100-Gbps Ethernet IP Core User Guide 2018-01-03
Low Latency 40-Gbps Ethernet IP Core User Guide 2018-01-03
Low Latency Ethernet 10G MAC Intel FPGA IP Release Notes 2018-05-16
Low Latency Ethernet 10G MAC Intel FPGA IP User Guide 2019-01-09
Native Loopback Accelerator Functional Unit (AFU) User Guide 2018-12-04
Nios II Custom Instruction User Guide 2017-12-22
Nios II Performance Benchmarks 2018-10-15
Nios II Processor Reference Guide 2018-04-18
Nios II Software Developer's Handbook 2018-10-29
OpenCL on Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA Quick Start User Guide 2018-12-04
Other IP Cores Release Notes 2018-05-07
PCI Express High Performance Reference Design 2018-12-12
QDR II and QDR II+ SRAM Controller with UniPHY IP Core Release Notes 2018-11-05
RLDRAM II Controller with UniPHY and RLDRAM 3 PHY-Only IP Core Release Notes 2018-11-05
RapidIO II Intel FPGA IP Release Notes 2018-05-07
RapidIO II Intel FPGA IP User Guide 2018-09-25
RapidIO Intel FPGA IP User Guide 2018-08-09
Reed-Solomon II IP Core User Guide 2016-05-02
Remote Update Intel FPGA IP Core Release Notes 2018-05-07
Remote Update Intel FPGA IP User Guide 2019-01-09
SDI II Intel Arria 10 FPGA IP Design Example User Guide 2018-11-20
Serial Lite III Streaming Intel FPGA IP Core Release Notes 2018-09-24
SerialLite II IP Core User Guide 2019-01-09
Simulation Quick-Start for ModelSim - Intel FPGA Edition Intel Quartus Prime Standard Edition 2018-05-08
Simulation Quick-Start for ModelSim - Intel FPGA Edition: Intel Quartus Prime Pro Edition 2018-09-25
Streaming DMA Accelerator Functional Unit (AFU) User Guide 2018-12-04
Tandem Motion-Power 48 V Board Reference Manual 2016-08-01
Unique Chip ID Intel FPGA IP Core Release Notes 2018-05-07
Video and Image Processing Suite Release Notes 2018-09-24
Video and Image Processing Suite User Guide 2018-09-24
Virtual JTAG (altera_virtual_jtag) IP Core User Guide 2018-07-19
Power and Thermal Management
Design Guidelines
End Applications
General Device Documentation
White Papers