Arria 10 SoC Device Documentation Support
Document PDF Published Date
25G Ethernet Intel Arria 10 FPGA IP User Guide 2021-03-29
5G LDPC Intel FPGA IP User Guide 2021-03-29
AN 806: Hierarchical Partial Reconfiguration Tutorial: for Intel Arria 10 GX FPGA Development Board 2021-02-04
AN 813: Hierarchical Partial Reconfiguration over PCI Express Reference Design: for Intel Arria 10 Devices 2021-01-20
AN 903: Accelerating Timing Closure: in Intel Quartus Prime Pro Edition 2021-02-25
AN 934: Using Flexible Radio Platform with Intel Arria 10 FPGA and ADI ADRV9029 Sub6G EBZ Board 2021-03-18
Advanced Link Analyzer: User Guide 2021-04-13
Arria 10 FPGA Development Kit User Guide 2021-03-19
Avalon Verification IP Suite: User Guide 2021-01-29
CPRI Intel FPGA IP User Guide 2021-03-05
DisplayPort Intel FPGA IP User Guide 2021-01-20
Embedded Peripherals IP User Guide 2021-03-29
Ethernet Design Example Components User Guide 2021-03-29
External Memory Interfaces Intel Arria 10 FPGA IP Design Example User Guide 2021-03-29
External Memory Interfaces Intel Arria 10 FPGA IP User Guide 2021-03-29
Floating-Point IP Cores User Guide 2021-03-12
GPIO Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2021-03-29
HDMI Intel Arria 10 FPGA IP Design Example User Guide 2021-04-01
HDMI Intel FPGA IP User Guide 2021-04-01
Intel Arria 10 Transceiver PHY User Guide 2021-01-29
Intel Arria 10 and Intel Cyclone 10 GX Avalon Memory Mapped (Avalon-MM) Interface for PCI Express User Guide 2021-04-06
Intel FPGA Software Installation and Licensing 2021-03-29
Intel High Level Synthesis Compiler Pro Edition: Best Practices Guide 2021-03-29
Intel High Level Synthesis Compiler Pro Edition: Getting Started Guide 2021-03-29
Intel High Level Synthesis Compiler Pro Edition: Reference Manual 2021-03-29
Intel High Level Synthesis Compiler Pro Edition: User Guide 2021-03-29
Intel High Level Synthesis Compiler Pro Edition: Version 21.1 Release Notes 2021-03-29
Intel Quartus Prime Pro Edition User Guide: Design Compilation 2021-03-29
Intel Quartus Prime Pro Edition User Guide: Design Recommendations 2021-03-29
Intel Quartus Prime Pro Edition User Guide: Getting Started 2021-03-29
Intel Quartus Prime Pro Edition User Guide: Platform Designer 2021-03-29
Intel Quartus Prime Pro Edition User Guide: Scripting 2021-03-29
Intel Quartus Prime Pro Edition: Version 21.1 Software and Device Support Release Notes 2021-03-29
JESD204B Intel FPGA IP User Guide 2021-04-01
LVDS SERDES Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2021-03-29
Low Latency 100-Gbps Ethernet IP Core User Guide 2021-04-15
Low Latency 40-Gbps Ethernet IP Core User Guide 2021-03-08
Nios II Software Developer Handbook 2021-04-02
O-RAN Intel FPGA IP User Guide 2021-03-20
PHY Lite for Parallel Interfaces Intel FPGA IP User Guide 2021-02-04
Parallel Flash Loader Intel FPGA IP User Guide 2021-03-29
Triple-Speed Ethernet Intel FPGA IP Release Notes 2021-04-01
Triple-Speed Ethernet Intel FPGA IP User Guide 2021-02-19
Turbo Intel FPGA IP User Guide 2021-03-28
Video and Image Processing Suite User Guide 2021-02-12
eCPRI Intel FPGA IP Design Example User Guide 2021-02-26
eCPRI Intel FPGA IP Release Notes 2021-02-26
eCPRI Intel FPGA IP User Guide 2021-02-26
10-Gbps Ethernet (10GbE) MAC IP Core Release Notes 2016-05-02
100G Interlaken IP Core Release Notes 2016-05-02
50 Gbps Ethernet IP Core User Guide 2017-11-07
50G Ethernet IP Core Release Notes 2017-05-08
50G Interlaken IP Core Release Notes 2016-05-02
ALTERA_CORDIC IP Core User Guide 2017-05-08
AN 496: Using the Internal Oscillator IP Core 2017-11-06
AN 699: Using the Altera Ethernet Design Toolkit 2016-05-13
AN 701: Scalable Low Latency Ethernet 10G MAC using Intel Arria 10 1G/10G PHY 2017-11-06
AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor 2015-05-04
AN 735: Altera Low Latency Ethernet 10G MAC IP Core Migration Guidelines 2015-05-04
AN 736: Nios II Processor Booting From Altera Serial Flash (EPCQ) 2016-05-20
AN 738: Intel Arria 10 Device Design Guidelines 2017-06-30
AN 742: PMBus SmartVID Controller Reference Designs 2017-05-08
AN 747: Implementing PHYLite in Intel Arria 10 Devices Design Examples 2017-05-08
AN 749: Altera JESD204B IP Core and ADI AD9144 Hardware Checkout Report 2015-12-18
AN 753: Altera JESD204B IP Core and ADI AD6676 Hardware Checkout Report 2015-11-02
AN 756: Altera GPIO to Altera PHYLite Design Implementation Guidelines 2017-05-08
AN 768: Multi-Rate (Up to 12G) SDI II Reference Design for Intel Arria 10 Devices 2017-05-08
AN 776: Intel Arria 10 UHD Video Reference Design 2018-01-11
AN 777: Data Word Alignment Calibration With Multiple Intel FPGA PHYLite for Parallel Interfaces IP Cores 2018-01-12
AN 793: Intel Arria 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design 2017-06-13
AN 814: Intel Arria 10 Two x8-Lane JESD204B (Duplex) IP Cores Multi-Device Synchronization Reference Design 2018-01-30
AN 824: Intel FPGA SDK for OpenCL Board Support Package Floorplan Optimization Guide 2017-08-08
AN 831: Intel FPGA SDK for OpenCL Host Pipelined Multithread 2017-11-20
AN 838: Interoperability between Intel Arria 10 NBASE-T Ethernet Solution with Aquantia* Ethernet PHY Reference Design 2018-01-12
AN-744: Scalable Triple Speed Ethernet Reference Design for Arria 10 Devices 2016-04-27
AN-785: Altera JESD204B IP Core and ADI AD9162 Hardware Checkout Report 2016-12-06
AN647: Single-Port Triple Speed Ethernet and On-Board PHY Chip Reference Design 2015-12-14
AN752: Guidelines for Handling Altera Wafer Level Chip Scale Package (WLCSP) 2015-11-02
AN794: Arria 10 Low Latency Ethernet 10G MAC and XAUI PHY Reference Design 2017-02-01
Arria 10 1G/10GbE and 10GBASE-KR PHY IP Core Release Notes 2016-10-31
Arria 10 FPLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver ATX PLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver CMU PLL IP Core Release Notes 2016-10-31
Arria 10 Transceiver Native PHY IP Core Release Notes 2016-10-31
Configuring Altera FPGAs 2014-12-15
Early Power Estimator for Intel Arria 10 FPGAs User Guide 2016-11-07
Fixed-Point IP Cores (ALTERA_FIXED-POINT_FUNCTIONS) User Guide 2017-03-31
High-speed Reed-Solomon IP Core Release Notes 2017-11-06
Hybrid Memory Cube Controller Design Example User Guide 2016-05-02
Hybrid Memory Cube Controller IP Core Release Notes 2016-05-02
Hybrid Memory Cube Controller IP Core User Guide 2016-05-02
Intel Arria 10 Native Fixed Point DSP IP Core User Guide 2016-06-10
Intel Arria 10 Native Floating-Point DSP Intel FPGA IP User Guide 2017-11-06
Intel Arria 10 and Intel Cyclone 10 Avalon -MM Interface for PCIe Design Example User Guide 2017-11-06
Intel Quartus Prime Standard Edition Handbook Volume 2 Design Implementation and Optimization 2017-11-06
Interlaken IP Core Feature and Interface Differences Between Stratix 10, Arria 10, and Stratix V Devices 2017-06-12
Interlaken PHY IP Core Release Notes 2016-10-31
LDPC IP Core User Guide 2017-11-06
Low Latency 100-Gbps Ethernet IP Core Release Notes 2017-07-07
Low Latency 100G Ethernet Design Example User Guide 2017-11-08
Low Latency 40- and 100-Gbps Ethernet MAC and PHY IP Core Release Notes 2017-07-08
Low Latency 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide 2017-12-28
Low Latency 40-Gbps Ethernet IP Core Release Notes 2017-07-07
Low Latency 40G Ethernet Example Design User Guide 2017-11-08
Nios II Embedded Design Suite Release Notes 2015-06-17
Nios II Floating Point Hardware 2 Component User Guide
Nios II Gen2 Migration Guide 2015-06-12
Other Transceiver IP Cores Product Release Notes 2016-10-31
PCB Stackup Design Considerations for Intel FPGAs 2017-06-28
PCI Express Avalon -MM DMA Reference Design 2017-05-08
PCI Express DMA Reference Design Using External Memory 2017-05-17
Partial Reconfiguration Solutions IP User Guide 2017-11-06
SDI Audio IP Cores Release Notes 2017-05-08
SerialLite II IP Core Release Notes 2017-05-08
SmartVID Controller IP Core Release Notes 2017-05-08
SmartVID Controller IP Core User Guide 2017-05-08
Timing Analyzer Quick-Start Tutorial Intel Quartus Prime Pro Edition 2017-12-01
Using the Altera PDN Tool to Optimize Your Power Delivery Network Design 2015-07-08
Vision Processing with the Canny Edge Detection Reference Design 2015-02-14
Viterbi IP Core User Guide 2017-11-06
XAUI PHY Release Notes 2017-05-08
100G Interlaken Design Example User Guide 2018-03-22
10Gbps Ethernet Accelerator Functional Unit Design Example User Guide: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-04-30
1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel FPGA IP Release Notes 2018-09-24
25G Ethernet Intel Arria 10 FPGA IP Design Example User Guide 2020-12-14
25G Ethernet Intel FPGA IP Release Notes 2020-12-14
40Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-04-30
4G Turbo-V Intel FPGA IP User Guide 2020-11-18
50G Ethernet Design Example User Guide 2019-04-03
50G Interlaken Design Example User Guide 2018-03-22
5G LDPC-V Intel FPGA IP User Guide 2020-08-19
AN 307: Intel FPGA Design Flow for Xilinx Users 2020-08-24
AN 370: Using the Intel FPGA Serial Flash Loader with the Intel Quartus Prime Software 2019-02-18
AN 522: Implementing Bus LVDS Interface in Supported Intel FPGA Device Families 2018-07-31
AN 556: Using the Design Security Features in Intel FPGAs 2019-11-12
AN 692: Power Sequencing Considerations for Intel Cyclone 10 GX, Intel Arria 10, Intel Stratix 10, and Intel Agilex Devices 2019-10-11
AN 704: FPGA-based Safety Separation Design Flow for Rapid Functional Safety Certification 2018-09-01
AN 711: Power Reduction Features in Intel Arria 10 Devices 2020-03-18
AN 720: Simulating the ASMI Block in Your Design 2020-07-29
AN 728: I/O PLL Reconfiguration and Dynamic Phase Shift for Intel Arria 10 and Intel Cyclone 10 GX Devices 2019-04-03
AN 737: SEU Detection and Recovery in Intel Arria 10 Devices 2020-04-13
AN 745: Design Guidelines for DisplayPort Intel FPGA IP Interface 2020-04-13
AN 746: SDI II Triple-Rate Reference Designs for Intel Arria 10 Devices 2019-12-31
AN 775: Generating Initial I/O Timing Data: for Intel FPGAs 2019-12-08
AN 784: Partial Reconfiguration over PCI Express Reference Design for Intel Arria 10 Devices 2018-09-24
AN 792: Intel FPGA JESD204B IP Core and ADI AD9371 Hardware Checkout Report 2017-12-18
AN 795: Implementing Guidelines for 10G Ethernet Subsystem Using Low Latency 10G MAC Intel FPGA IP in Intel Arria 10 Devices 2020-10-28
AN 797: Partially Reconfiguring a Design: on Intel Arria 10 GX FPGA Development Board 2020-12-11
AN 799: Quick Intel Arria 10 Design Debugging Using Signal Probe and Rapid Recompile 2018-08-16
AN 803: Implementing Analog-to-Digital Converter Multi-Link Designs with Intel Arria 10 JESD204B RX IP Core 2020-02-06
AN 807: Configuring the Intel Arria 10 GX FPGA Development Kit for the Intel FPGA SDK for OpenCL 2020-02-14
AN 808: Migration Guidelines from Intel Arria 10 to Intel Stratix 10 for 10G Ethernet Subsystem 2019-11-20
AN 812: Platform Designer System Design Tutorial 2018-04-02
AN 817: Static Update Partial Reconfiguration Tutorial: for Intel Arria 10 GX FPGA Development Board 2019-07-15
AN 829: PCI Express Avalon -MM DMA Reference Design 2018-06-11
AN 834: Using the Intel HLS Compiler Pro Edition with an IDE 2020-05-29
AN 837: Design Guidelines for HDMI Intel FPGA IP 2019-01-28
AN 839: Design Block Reuse Tutorial: for Intel Arria 10 FPGA Development Board 2019-07-26
AN 845: Signal Tap Tutorial for Intel Arria 10 Partial Reconfiguration Design 2018-10-08
AN 847: Signal Tap Tutorial with Design Block Reuse: for Intel Arria 10 FPGA Development Board 2020-12-21
AN 851: Incremental Block-Based Compilation Tutorial: for Intel Arria 10 FPGA Development Board 2019-07-15
AN 856: K-Mean Clustering with the Intel FPGA SDK for OpenCL 2018-06-12
AN 866: Mitigating and Debugging Single Event Upsets in Intel Quartus Prime Standard Edition 2021-01-05
AN 870: Stencil Computation Reference Design 2018-10-10
AN 871: Quick Guide for Intel Arria 10 and Intel Cyclone 10 GX Transceiver High-Speed Link Tuning 2018-09-26
AN 872: Thermal and Power Guidelines: For Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-08-30
AN 887: PHY Lite for Parallel Interfaces Reference Design with Dynamic Reconfiguration for Intel Arria 10 Devices 2019-05-24
AN 889: 8K DisplayPort Video Format Conversion Design Example 2019-05-30
AN 893: Hierarchical Partial Reconfiguration Tutorial: for Intel Cyclone 10 GX FPGA Development Board 2019-07-15
AN 899: Reducing Compile Time with Fast Preservation 2019-11-06
AN 907: Enabling 5G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000 2020-09-10
AN 908: Enabling 4G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000 2020-01-30
AN 918: Using the Intel HLS Compiler Standard Edition with an IDE 2020-05-29
AN 932: Flash Access Migration Guidelines from Control Block-Based Devices to SDM-Based Devices 2020-12-21
ASMI Parallel II Intel FPGA IP Core Release Notes 2018-05-07
ASMI Parallel II Intel FPGA IP User Guide 2020-07-29
ASMI Parallel Intel FPGA IP Core User Guide 2019-07-02
Advanced SEU Detection Intel FPGA IP User Guide 2019-03-26
Altera Complete Design Suite Version 14.0 Arria 10 Edition Update Release Notes 2014-09-01
Arria 10 GX Transceiver Signal Integrity Development Kit User Guide 2017-08-08
Avalon Interface Specifications 2020-12-21
BCH Intel FPGA IP: User Guide 2018-11-30
Battery Management System Reference Design 2016-04-02
Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000 2019-11-25
CIC Intel FPGA IP: User Guide 2019-09-30
Chip ID Intel FPGA IP Cores User Guide 2020-10-05
Clock Control Block (ALTCLKCTRL) IP Core Release Notes 2020-09-28
Compiling and Customizing an Intel Arria 10 Custom Platform for OpenCL 2018-10-30
Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms 2016-12-13
Customizable Flash Programmer User Guide 2018-11-28
DDR2 and DDR3 SDRAM Controller with UniPHY IP Core Release Notes 2019-07-01
DMA Accelerator Functional Unit User Guide: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2020-03-06
Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide 2020-10-06
DisplayPort Intel Arria 10 FPGA IP Design Example User Guide 2020-09-28
Embedded Design Handbook 2020-07-22
Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT) User Guide 2020-03-11
Error Message Register Unloader Intel FPGA IP Core User Guide 2018-05-23
Ethernet Design Example Components Release Notes 2020-12-14
External Memory Interface Handbook Volume 1: Intel FPGA Memory Solution Overview, Design Flow, and General Information 2017-05-08
External Memory Interface Handbook Volume 2: Design Guidelines 2017-05-08
External Memory Interface Handbook Volume 3: Reference Material 2019-07-24
External Memory Interfaces Intel Arria 10 FPGA IP Core Release Notes 2019-07-01
FFT IP Core: User Guide 2017-11-06
FIFO Intel FPGA IP User Guide 2020-12-14
Fault Injection Intel FPGA IP Core User Guide 2019-07-09
Guidelines for Developing a Nios II HAL Device Driver 2015-06-12
High-speed Reed-Solomon IP Core User Guide 2017-11-06
IOPLL Intel FPGA IP Core Release Notes 2020-09-28
IOPLL Intel FPGA IP Core User Guide 2019-06-24
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.0 Errata 2018-06-22
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.1 Errata 2018-08-06
Intel Acceleration Stack for Intel Xeon CPU with FPGAs 1.1 Release Notes 2018-08-06
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual 2019-11-04
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Release Notes 2018-04-11
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Version 1.1 Release Notes: Intel FPGA Programmable Acceleration Card N3000 2019-11-25
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Version 1.2 Errata 2018-12-04
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Version 1.2.1 Release Notes 2020-03-06
Intel Accelerator Functional Unit Simulation Environment Quick Start User Guide 2020-03-06
Intel Arria 10 Avalon Streaming with SR-IOV IP for PCIe User Guide 2020-12-14
Intel Arria 10 Core Fabric and General Purpose I/Os Handbook 2020-11-05
Intel Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide 2020-09-01
Intel Arria 10 Device Datasheet 2020-06-26
Intel Arria 10 Device Overview 2020-10-20
Intel Arria 10 GX, GT, and SX Device Family Pin Connection Guidelines 2020-12-23
Intel Arria 10 GX/GT Device Errata and Design Recommendations 2020-01-10
Intel Arria 10 Military Temperature Range Support Technical Brief 2019-11-05
Intel Arria 10 SX Device Errata and Design Recommendations 2020-01-10
Intel Arria 10 and Intel Cyclone 10 GX Avalon -ST Interface for PCI Express User Guide 2020-06-02
Intel Arria 10 and Intel Cyclone 10 GX Avalon streaming Hard IP for PCIe Design Example User Guide 2020-05-13
Intel Arria 10 and Intel Cyclone 10 GX Hard IP for PCI Express IP Core Release Notes 2020-12-14
Intel Arria 10 or Intel Cyclone 10 GX Avalon Memory Mapped (Avalon-MM) DMA Interface for PCI Express Solutions User Guide 2019-12-23
Intel FPGA Download Cable User Guide 2020-03-11
Intel FPGA Integer Arithmetic IP Cores User Guide 2020-10-05
Intel FPGA Programmable Acceleration Card N3000 Data Sheet 2020-03-03
Intel FPGA SDK for OpenCL Pro Edition: Custom Platform Toolkit User Guide 2020-09-28
Intel FPGA SDK for OpenCL Standard Edition: Custom Platform Toolkit User Guide 2018-09-24
Intel FPGA SDK for OpenCL: Intel Arria 10 GX FPGA Development Kit Reference Platform Porting Guide 2019-04-18
Intel FPGA SDK for OpenCL: Intel Arria 10 SoC Development Kit Reference Platform Porting Guide 2019-10-08
Intel FPGA Software Installation and Licensing Quick Start 2018-11-26
Intel FPGA Temperature Sensor IP Core User Guide 2018-05-30
Intel FPGA Voltage Sensor IP Core User Guide 2018-02-09
Intel High Level Synthesis Accelerator Functional Unit Design Example User Guide 2019-07-19
Intel High Level Synthesis Compiler Standard Edition: Best Practices Guide 2019-12-18
Intel High Level Synthesis Compiler Standard Edition: Getting Started Guide 2020-03-26
Intel High Level Synthesis Compiler Standard Edition: Reference Manual 2019-12-18
Intel High Level Synthesis Compiler Standard Edition: User Guide 2019-12-18
Intel High Level Synthesis Compiler Standard Edition: Version 19.1 Release Notes 2019-03-26
Intel Programmable Acceleration Card (PAC) with Intel Arria 10 GX FPGA Data Sheet 2020-10-26
Intel Quartus Prime Design Suite Version 18.1 Update Release Notes 2019-04-17
Intel Quartus Prime Pro Edition User Guide: Debug Tools 2020-09-28
Intel Quartus Prime Pro Edition User Guide: Design Constraints 2020-11-04
Intel Quartus Prime Pro Edition User Guide: Partial Reconfiguration 2020-12-11
Intel Quartus Prime Pro Edition User Guide: Programmer 2020-12-14
Intel Quartus Prime Pro Edition User Guide: Third-party Logic Equivalence Checking Tools 2019-08-30
Intel Quartus Prime Standard Edition Handbook Volume 1 Design and Synthesis 2018-05-09
Intel Quartus Prime Standard Edition Handbook Volume 3 Verification 2018-05-09
Intel Quartus Prime Standard Edition: Version 20.1 Software and Device Support Release Notes 2020-11-23
Intel Quartus Prime Timing Analyzer Cookbook 2018-11-12
Introduction to Intel FPGA IP Cores 2020-11-09
JESD204B IP Core Design Example User Guide 2017-11-06
JESD204B Intel Arria 10 FPGA IP Design Example User Guide 2020-02-13
JESD204B Intel FPGA IP Release Notes 2019-12-16
Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example User Guide 2020-11-30
Low Latency Ethernet 10G MAC Intel FPGA IP Release Notes 2019-10-02
Low Latency Ethernet 10G MAC Intel FPGA IP User Guide 2020-12-14
ModelSim - Intel FPGA Edition Simulation Quick-Start: Intel Quartus Prime Pro Edition 2019-12-30
ModelSim - Intel FPGA Edition Simulation Quick-Start: Intel Quartus Prime Standard Edition 2019-12-30
NCO IP Core: User Guide 2017-11-06
Native Loopback Accelerator Functional Unit (AFU) User Guide 2019-08-05
Networking Interface for Open Programmable Acceleration Engine: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-08-05
Nios II Custom Instruction User Guide 2020-04-27
Nios II Performance Benchmarks 2020-05-14
Nios II Processor Reference Guide 2020-10-22
O-RAN Intel FPGA IP Design Example User Guide 2020-11-30
OCT Intel FPGA IP User Guide 2019-07-03
PCI Express High Performance Reference Design 2018-12-12
PCI Express: Migrating to Intel Stratix 10 Devices for the Avalon Streaming Interface 2017-05-08
PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces 2017-01-23
PHY Lite for Parallel Interfaces Intel FPGA IP Core Release Notes 2020-12-14
QDR II and QDR II+ SRAM Controller with UniPHY IP Core Release Notes 2019-07-01
RLDRAM II Controller with UniPHY and RLDRAM 3 PHY-Only IP Core Release Notes 2019-07-01
RapidIO II Intel FPGA IP Release Notes 2020-09-28
RapidIO II Intel FPGA IP User Guide 2020-09-28
RapidIO Intel FPGA IP Core Release Notes 2020-09-28
RapidIO Intel FPGA IP User Guide 2020-09-28
Reed-Solomon II IP Core User Guide 2016-05-02
Remote Update Intel FPGA IP Core Release Notes 2018-05-07
Remote Update Intel FPGA IP User Guide 2020-02-11
SDI Audio Intel FPGA IP User Guide 2020-10-05
SDI II Intel Arria 10 FPGA IP Design Example User Guide 2018-11-20
SDI II Intel FPGA IP User Guide 2020-10-01
SDI IP Core User Guide 2020-08-20
Security User Guide: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2020-03-06
Serial Digital Interface (SDI) IP Core Release Notes 2020-08-20
Serial Lite III Streaming Intel Arria 10 FPGA IP Design Example User Guide 2019-05-13
Serial Lite III Streaming Intel FPGA IP Core Release Notes 2018-09-24
Serial Lite III Streaming Intel FPGA IP Core User Guide 2020-07-10
SerialLite II IP Core User Guide 2019-01-09
Streaming DMA Accelerator Functional Unit User Guide: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2020-03-06
Unique Chip ID Intel FPGA IP Core Release Notes 2018-05-07
Video and Image Processing Suite Release Notes 2019-04-15
Virtual JTAG Intel FPGA IP Core User Guide 2020-12-01
Power and Thermal Management
Design Guidelines
End Applications
General Device Documentation
White Papers