Power-Up Sequencing

MAX® II CPLDs are optimized for control path applications such as power-up sequencing, which includes multi-voltage system power up and system reset, and chip-select generation. These two applications are often integrated into a single non-volatile, instant-on device.

Multi-voltage system power-up requires a device to be instantly on and ready to manage the power-up sequence for other devices on the PCB. As board density and the number of power planes on a board increases, the complexity of the power-up sequencing also increases. MAX II CPLDs can easily manage the power-up sequencing for all levels of system complexity.

Table 1 describes some MAX II CPLD features that serve these power-up sequencing needs.

Table 1. MAX II CPLD Application Solutions: Power-Up Sequencing




Instant-on performance allows MAX II CPLDs to power up first and manage the start sequences for other devices.

MultiVolt Core

MultiVolt core allows you to select the most convenient supply voltage for your system: 3.3 V, 2.5 V, or 1.8 V.

Lowest Cost per I/O Pin

MAX II CPLDs are the ideal solution for the high pin count requirements of power-up sequencing, offering the lowest cost per I/O pin.


MAX II CPLD re-programmability provides the greatest flexibility to support last-minute changes that occur after the board is laid out.

Figure 1. Multi-Voltage System Power-Up Management Using a MAX II CPLD


Figure 1 illustrates a typical MAX II CPLD power-up sequencing application. Multiple power rails support different devices, and control logic is needed to manage the complete power-up sequence of each device. To ensure that accidental driving of these signals does not occur during power up, the MAX II CPLD is also used to control critical bus signals until the power up is complete. The JTAG port monitors the power-up sequence, storing errors and information upon power up. It can also be used to set break points in the power-up sequencing, which is useful during the debug phase.

Figure 2. Board Swapping Management and Monitoring


As shown in Figure 2, the MAX II CPLD monitors the addition or removal of boards to the backplane. The high-current output drives enable signal LEDs to directly indicate which boards are plugged in while the user flash memory logs this information for diagnostic purposes. The MAX II CPLD provides a low-cost, single-chip solution by integrating flash memory on-chip.The MAX II CPLD family also supports hot socketing for additional flexibility. These devices can be plugged into and out of a live system without damage. MAX II CPLDs are an optimal solution for controlling the power-up sequencing for plug-in boards.

  1. UFM: user flash memory