Transceiver Signal Integrity Development Kit, Stratix® IV GT Edition

The Transceiver Signal Integrity Development Kit, Stratix® IV GT Edition enables a thorough evaluation of transceiver interoperability and serializer/deserializer (SERDES) signal integrity by allowing you to perform the following functions:

  • Evaluate transceiver performance up to 11.3 Gbps
  • Generate and check pseudo-random binary sequence (PRBS) patterns via a simple-to-use GUI (does not require Intel® Quartus® Prime Software)
  • Dynamically change differential output voltage (VOD), pre-emphasis, and equalization settings to optimize transceiver performance for your channel
  • Perform jitter analysis
  • Verify physical medium attachment (PMA) compliance to 40G/100G Ethernet, Interlaken, CEI-6G/11G, PCI Express* (Gen1, Gen2, and Gen3), RapidIO*, and other major standards
  • Validate interoperability between optical modules (optical modules require SMA input to test interoperability with the Transceiver Signal Integrity Development Kit, Stratix IV GT Edition), such as small form factor pluggable (SFP), SFP+, and quad small form factor pluggable (QSFP)

 

Ordering Information

Table 1. Transceiver Signal Integrity Development Kit, Stratix IV GT Edition

Ordering Code Price Ordering Information
DK-SI-4S100G2N $7,995
Buy Now
 In North America, call 1-888-800-0631 or contact your local distributor.
For International sales, contact your local distributor.

Buyer represents that it is a product developer, software developer or system integrator and acknowledges that this product is an evaluation kit that is not FCC authorized, is made available solely for evaluation and software development, and may not be resold.

Development Kit Contents

The Transceiver Signal Integrity Development Kit, Stratix IV GT Edition has the following features:

  • Stratix IV GT development board (see Figure 1)
    • Featured device
      • EP4S100G2F40I1N
    • Configuration status and set-up elements
      • Fast passive parallel (FPP) configuration
      • Embedded Intel FPGA Download Cable
  • Clocks
    • Onboard clock oscillators: 50 MHz, 100 MHz, 644.53 MHz, and 706.25 MHz
    • SMA connectors for supplying an external differential clock to transceiver reference clock
  • General user input and output
    • Dual in-line package (DIP) and push-button switches
    • LEDs
    • LCD
  • Memory devices
    • 64-MB sync flash memory (primarily to store FPGA configurations)
  • Components and interfaces
    • Six full-duplex transceiver channels routed to SMA connectors
      • All channels support up to 11.3-Gbps data rate
    • Six full-duplex transceiver channels routed to FCI Airmax connector
    • Power measurement circuitry on transceiver-related supplies
    • The voltage on all (and only) these rails can be supplied via banana jacks
    • Temperature measurement circuitry
      • Die temperature
      • Ambient temperature
    • RJ-45 jack and 10/100/1000Base-T Ethernet PHY
  • Backplane drive capability at 6.5 Gbps
    • Directly connect the transceiver signal integrity development kit to an FCI backplane (not included) through the FCI connector header
    • Couple with a second signal integrity development kit or FCI daughtercard (not included) for a complete end-to-end backplane channel analysis
  • Application GUI
    • Platform independent
    • Interfaces to PC via JTAG
    • Embedded blaster
    • User controllable
      • VOD and pre-emphasis settings
      • Equalizer setting
      • Test pattern
    • Status indicator
      • Number of errors
      • Bit-error rate (BER)
      • Lock signal
    • Eye Viewer reconstructs the eye width in the device receiver for monitoring signal quality after equalization (up to 6 Gbps)
  • Intel Quartus Prime design software license is not included and is not required for kit evaluation.

Stratix IV GT Development Board

Figure 1. Stratix IV GT Development Board

Table 2. Collateral

Document Description Version
Transceiver Signal Integrity Development Kit, Stratix IV GT Edition User Guide (PDF) Information about setting up the Stratix IV GT transceiver signal integrity board and using the included software. 9.1.0
Transceiver Signal Integrity Development Kit, Stratix IV GT Edition Reference Manual (PDF) Detailed information about board components and interfaces. 9.1.0
Kit Installation Full installation of all files included in the development kit, including the reference manual, user guide, quick start guide, BOM, layout, PCB, schematics, signal integrity demonstration, Board Update Portal, etc. 9.1.2
Kit Installation Full installation of all files included in the development kit, including the reference manual, user guide, quick start guide, BOM, layout, PCB, schematics, signal integrity demonstration, Board Update Portal, etc. 11.1.0
Kit Installation Full installation of all files included in the development kit, including the reference manual, user guide, quick start guide, BOM, layout, PCB, schematics, signal integrity demonstration, Board Update Portal, etc. 12.0.0

For information on the Transceiver Signal Integrity Development Kit, Stratix IV GX (8.5 Gbps) Edition, please visit www.altera.com/sikit.