Stratix® IV GX FPGA Development Kits

from Intel (formerly Altera)

• Ordering information
• Development kit contents
• Available documentation
• Reference designs and design examples
• Related links

The Stratix IV GX FPGA Development Kits deliver a complete system-level design environment that includes both the hardware and software needed to immediately begin developing FPGA designs. With a PCI-SIG*-compliant board and a 1-year license for Quartus^® Prime design software, you can:

• Develop and test PCI Express* 2.0 (up to x8 lane) endpoint and root port designs
• Develop and test memory subsystems consisting of DDR3 and QDR II+ memory
• Build designs capable of migrating to the company's low-cost HardCopy^® IV ASICs
• Add other Stratix IV GX FPGA-supported protocol interfaces such as 10 Gbps Ethernet, CPRI, OBSAI, SAS/SATA, Serial RapidIO*, and many others by taking advantage of the modular capability of these boards through the high-speed mezzanine connectors and over 30 different high-speed mezzanine cards (HSMCs) available through the following companies.

Ordering Information

Notes:

1. Buyer represents that it is a product developer, software developer or system integrator and acknowledges that this product is an evaluation kit that is not FCC authorized, is made available solely for evaluation and software development, and may not be resold.
2. You can purchase optional high-speed mezzanine connector interface-compatible daughtercards, adapters, or cables to use with your development kit.

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Development Kit Contents

The Stratix IV GX FPGA Development Kits feature the following:

• Stratix IV GX FPGA development board (see Figure 1)
  • Featured devices
    • Stratix IV GX EP4SGX230KF40C2N FPGA 
    • Stratix IV GX EP4SGX530KH40C2N FPGA
  • Configuration status and set-up elements
    • Fast passive parallel (FPP) configuration via a MAX^® II EPM2210 CPLD and flash memory
    • On-board USB-Blaster^TM download cable using Quartus Programmer
  • Clocks
    • On-board clock oscillators: 50 MHz, 100 MHz, 125 MHz, 148.5 MHz, 155.52 MHz, and 156.25 MHz
    • SMA connectors for external clock input
    • SMA connectors for clock output
  • General user input/output
    • LEDs
    • LCD display
    • Push-button and dual in-line package (DIP) switches
  • Memory devices
    • 512 MB DDR3 SDRAM with a 64 bit data bus
    • 128 MB DDR3 SDRAM with a 16 bit data bus
    • Two 4 MB QDR II+ SRAMs with 18 bit data buses
    • 64 MB sync flash and 2 MB SSRAM
  • Component and interfaces
    • PCI Express x8 edge connector
    • 10/100/1000BASE-T Ethernet PHY with RJ-45 connector
    • Two HSMC connectors
    • HDMI video output
    • 3G-SDI video input and output
    • Power measurement circuitry
    • Temperature measurement circuitry
  • Power
    • Laptop DC input
    • PCI Express edge connector power
    • Power measurement circuitry
  • Other features
    • PCI Express half-length, full-height (6.6" x 4.376") board format
• Stratix IV GX FPGA Development Kit soft content (download from Table 2)
  • Design examples
    • Board Update Portal featuring the Nios^® II processor web server and remote system update
    • Board Test System
  • Complete documentation
• Intel® FPGA's Complete Design Suite (download from Download Center)
  • Quartus Prime design software includes support for Stratix IV FPGAs and HardCopy IV ASICs
    • 1-year license included
  • Nios II Embedded Design Suite
  • Intel^® FPGA intellectual property (IP) library includes PCI Express, Triple-Speed Ethernet, SDI, and DDR3 High-Performance Controller Intel FPGA IP cores
  • • IP evaluation available through OpenCore Plus
• Loopback and debug HSMCs
• Power adapter and cables

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Available Documentation

Reference Designs and Design Examples

Table 3 provides a list of Stratix IV GX FPGA designs, not delivered with the kits, but available for download.

Note: Some of the following designs may have only been tested to run on kits that have EP4SGX230N engineering sample silicon.

Note:

1. The Quartus Prime design software and the Intel FPGA IP library are standard software requirements for these designs.

• Documentation for Stratix IV Devices
• AN519: Stratix IV Design Guidelines (PDF)
• Stratix IV GX transceiver protocols
• Partner high-speed mezzanine connector cards
• Other Stratix IV FPGA-based development kits
• Jungo PCI Express WinDriver (30-day evaluation)