Registers for PCIE_CAP

Register Name Address Offset Attributes Description
PCIE_CAP_ID_PCIE_NEXT_CAP_PTR_PCIE_CAP_REG 0x0 DisplayName: PCI Express Capabilities, ID, Next Pointer Register. Register Size: 32 Value After Reset: 0x2b010 This is the PCI Express Capabilities, ID, and Next Pointer Register.
DEVICE_CAPABILITIES_REG 0x4 DisplayName: Device Capabilities Register. Register Size: 32 Value After Reset: 0x10008fe2 The Device Capabilities register identifies PCI Express device function specific capabilities.
DEVICE_CONTROL_DEVICE_STATUS 0x8 DisplayName: Device Control and Device Status Register. Register Size: 32 Value After Reset: 0x102910 This register controls PCI Express device specific parameters and provides information about PCI Express device (function) specific parameters.
LINK_CAPABILITIES_REG 0xc DisplayName: Link Capabilities Register. Register Size: 32 Value After Reset: 0x423d05 The Link Capabilities register identifies PCI Express Link specific capabilities.
LINK_CONTROL_LINK_STATUS_REG 0x10 DisplayName: Link Control and Link Status Register. Register Size: 32 Value After Reset: 0x10110000 This register controls and provides information about PCI Express Link specific parameters.
DEVICE_CAPABILITIES2_REG 0x24 DisplayName: Device Capabilities 2 Register. Register Size: 32 This register identifies PCI Express device specific capabilities; in addition to the Device Capabilities Register.
DEVICE_CONTROL2_DEVICE_STATUS2_REG 0x28 DisplayName: Device Control 2 and Status 2 Register. Register Size: 32 This register controls PCI Express device specific parameters and provides information about PCI Express device (function) specific parameters; in addition to the Device Control and Device Status Register.
LINK_CAPABILITIES2_REG 0x2c DisplayName: Link Capabilities 2 Register. Register Size: 32 This register identifies PCI Express Link specific capabilities; in addition to the Link Capabilities Register.
LINK_CONTROL2_LINK_STATUS2_REG 0x30 DisplayName: Link Control 2 and Status 2 Register. Register Size: 32 This register controls and provides information about PCI Express Link specific parameters; in addition to the Link Control and Link Status Register.