HAINT

         Host All Channels Interrupt Register
      
Module Instance Base Address Register Address
i_usbotg_0_DWC_otg_intreg 0xFFB00000 0xFFB00414
i_usbotg_1_DWC_otg_intreg 0xFFB40000 0xFFB40414

Size: 32

Offset: 0x414

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

HAINT

RO 0x0

HAINT Fields

Bit Name Description Access Reset
15:0 HAINT
Channel Interrupt for channel no.
Value Description
0x0 Not active
0x1 Host Channel Interrupt
RO 0x0