DVBUSPULSE

         Device VBUS Pulsing Time Register
      
Module Instance Base Address Register Address
i_usbotg_0_DWC_otg_intreg 0xFFB00000 0xFFB0082C
i_usbotg_1_DWC_otg_intreg 0xFFB40000 0xFFB4082C

Size: 32

Offset: 0x82C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED

RO 0x0

DVBUSPulse

RW 0x5B8

DVBUSPULSE Fields

Bit Name Description Access Reset
31:12 RESERVED
RESERVED
RO 0x0
11:0 DVBUSPulse
Device VBUS Pulsing Time (DVBUSPulse)
Specifies the VBUS pulsing time during SRP. This value equals:
VBUS pulsing time in PHY clocks / 1, 024
The value you use depends whether the PHY is operating at 30
MHz (16-bit data width) or 60 MHz (8-bit data width).
RW 0x5B8