MINTSTS
Name: Masked Interrupt Status Register
Size: 32 bits
Address Offset: 0x40
Read/write access: read
MISTATS = RIINTSTS and INTMASK
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_sdmmc_sdmmc_block | 0xFF808000 | 0xFF808040 |
Size: 32
Offset: 0x40
Access: RO
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
SDIO_INTERRUPT_CARD15 RO 0x0 |
SDIO_INTERRUPT_CARD14 RO 0x0 |
SDIO_INTERRUPT_CARD13 RO 0x0 |
SDIO_INTERRUPT_CARD12 RO 0x0 |
SDIO_INTERRUPT_CARD11 RO 0x0 |
SDIO_INTERRUPT_CARD10 RO 0x0 |
SDIO_INTERRUPT_CARD9 RO 0x0 |
SDIO_INTERRUPT_CARD8 RO 0x0 |
SDIO_INTERRUPT_CARD7 RO 0x0 |
SDIO_INTERRUPT_CARD6 RO 0x0 |
SDIO_INTERRUPT_CARD5 RO 0x0 |
SDIO_INTERRUPT_CARD4 RO 0x0 |
SDIO_INTERRUPT_CARD3 RO 0x0 |
SDIO_INTERRUPT_CARD2 RO 0x0 |
SDIO_INTERRUPT_CARD1 RO 0x0 |
SDIO_INTERRUPT_CARD0 RO 0x0 |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
END_BIT_ERROR_INTERRUPT RO 0x0 |
AUTO_COMMAND_DONE_INTERRUPT RO 0x0 |
BUSY_COMPLETE_INTERRUPT_INTERRUPT RO 0x0 |
HARDWARE_LOCKED_WRITE_INTERRUPT RO 0x0 |
FIFO_UNDER_OVER_RUN_INTERRUPT RO 0x0 |
HOST_TIMEOUT_INTERRUPT RO 0x0 |
DATA_READ_TIMEOUT_INTERRUPT RO 0x0 |
RESPONSE_TIMEOUT_INTERRUPT RO 0x0 |
DATA_CRC_ERROR_INTERRUPT RO 0x0 |
RESPONSE_CRC_ERROR_INTERRUPT RO 0x0 |
RECEIVE_FIFO_DATA_REQUEST_INTERRUPT RO 0x0 |
TRANSMIT_RECEIVE_FIFO_DATA_INTERRUPT RO 0x0 |
DATA_TRANSFER_OVER_INTERRUPT RO 0x0 |
COMMAND_DONE_INTERRUPT RO 0x0 |
RESPONSE_ERROR_INTERRUPT RO 0x0 |
CARD_DETECT_INTERRUPT RO 0x0 |
MINTSTS Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31 | SDIO_INTERRUPT_CARD15 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 30 | SDIO_INTERRUPT_CARD14 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 29 | SDIO_INTERRUPT_CARD13 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 28 | SDIO_INTERRUPT_CARD12 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 27 | SDIO_INTERRUPT_CARD11 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 26 | SDIO_INTERRUPT_CARD10 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 25 | SDIO_INTERRUPT_CARD9 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 24 | SDIO_INTERRUPT_CARD8 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 23 | SDIO_INTERRUPT_CARD7 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 22 | SDIO_INTERRUPT_CARD6 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 21 | SDIO_INTERRUPT_CARD5 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 20 | SDIO_INTERRUPT_CARD4 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 19 | SDIO_INTERRUPT_CARD3 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 18 | SDIO_INTERRUPT_CARD2 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 17 | SDIO_INTERRUPT_CARD1 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 16 | SDIO_INTERRUPT_CARD0 |
Interrupt from SDIO card; one bit for each card. Bit[31] corresponds to Card[15], and bit[16] is for Card[0]. SDIO interrupt for card enabled only if corresponding sdio_int_mask bit is set in Interrupt mask register (mask bit 1 enables interrupt; 0 masks interrupt).
0-No SDIO interrupt from card
1-SDIO interrupt from card
In MMC-Ver3.3-only mode, bits always 0.
|
RO | 0x0 | ||||||
| 15 | END_BIT_ERROR_INTERRUPT |
Interrupt enabled only if corresponding bit in interrupt mask register is set.
bit 15 End-bit error (read)/write no CRC (EBE)
|
RO | 0x0 | ||||||
| 14 | AUTO_COMMAND_DONE_INTERRUPT |
bit 14 Auto command done (ACD)
|
RO | 0x0 | ||||||
| 13 | BUSY_COMPLETE_INTERRUPT_INTERRUPT |
bit 13 Start Bit Error(SBE)/Busy Complete Interrupt (BCI)
|
RO | 0x0 | ||||||
| 12 | HARDWARE_LOCKED_WRITE_INTERRUPT |
bit 12 Hardware locked write error (HLE)
|
RO | 0x0 | ||||||
| 11 | FIFO_UNDER_OVER_RUN_INTERRUPT |
bit 11 FIFO underrun/overrun error (FRUN)
|
RO | 0x0 | ||||||
| 10 | HOST_TIMEOUT_INTERRUPT |
bit 10 Data starvation by host timeout (HTO)/Volt_switch_int
|
RO | 0x0 | ||||||
| 9 | DATA_READ_TIMEOUT_INTERRUPT |
bit 9 Data read timeout (DRTO)
|
RO | 0x0 | ||||||
| 8 | RESPONSE_TIMEOUT_INTERRUPT |
bit 8 Response timeout (RTO)
|
RO | 0x0 | ||||||
| 7 | DATA_CRC_ERROR_INTERRUPT |
bit 7 Data CRC error (DCRC)
|
RO | 0x0 | ||||||
| 6 | RESPONSE_CRC_ERROR_INTERRUPT |
bit 6 Response CRC error (RCRC)
|
RO | 0x0 | ||||||
| 5 | RECEIVE_FIFO_DATA_REQUEST_INTERRUPT |
bit 5 Receive FIFO data request (RXDR)
|
RO | 0x0 | ||||||
| 4 | TRANSMIT_RECEIVE_FIFO_DATA_INTERRUPT |
bit 4 Transmit FIFO data request (TXDR)
|
RO | 0x0 | ||||||
| 3 | DATA_TRANSFER_OVER_INTERRUPT |
bit 3 Data transfer over (DTO)
|
RO | 0x0 | ||||||
| 2 | COMMAND_DONE_INTERRUPT |
bit 2 Command done (CD)
|
RO | 0x0 | ||||||
| 1 | RESPONSE_ERROR_INTERRUPT |
bit 1 Response error (RE)
|
RO | 0x0 | ||||||
| 0 | CARD_DETECT_INTERRUPT |
bit 0 Card detect (CD)
|
RO | 0x0 |