ECC_WDataecc0bus

         The msb bit for the register is configured based on DAT parameter (RAM word size). Unimplemented bytes of this register will be reserved.
      
Module Instance Base Address Register Address
sdm_ecc_nand_e_ecc_registerBlock 0xFFA21800 0xFFA2186C

Size: 32

Offset: 0x6C

Access: WO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ECC_WDataecc3BUS

0x0

ECC_WDataecc2BUS

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ECC_WDataecc1BUS

0x0

ECC_WDataecc0BUS

0x0

ECC_WDataecc0bus Fields

Bit Name Description Access Reset
31:24 ECC_WDataecc3BUS
Eccdata from the register will be written to the RAM.
WO 0x0
23:16 ECC_WDataecc2BUS
Eccdata from the register will be written to the RAM.
WO 0x0
15:8 ECC_WDataecc1BUS
Eccdata from the register will be written to the RAM.
WO 0x0
7:0 ECC_WDataecc0BUS
Eccdata from the register will be written to the RAM.
WO 0x0