mem 

         Registers dealing with PLL internal memory access.
Module Instance Base Address Register Address
i_clk_mgr_perpllgrp 0xFFD100A4 0xFFD100EC

Size: 32

Offset: 0x48

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

wr

RW 0x0

req

RW 0x0

wdat

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

addr

RW 0x0

mem Fields

Bit Name Description Access Reset
25 wr 
Memory Read/Write Signal. 0 – Indicates A Read Transaction. 1 – Indicates A Write Transaction
Value Description
0 READ
1 WRITE
RW 0x0
24 req 
Memory Request Signal
RW 0x0
23:16 wdat 
Memory Write Data
RW 0x0
9:0 addr 
PLL Memory Addressing
RW 0x0