IC_CLR_RX_DONE

         Name: Clear RX_DONE Interrupt Register
Size: 1 bit
Address Offset: 0x58
Read/Write Access: Read
Dependencies: This register is not applicable  when IC_ULTRA_FAST_MODE=1

      
Module Instance Base Address Register Address
i_i2c_emac_0_DW_apb_i2c_addr_block1 0xFFC02A00 0xFFC02A58
i_i2c_emac_1_DW_apb_i2c_addr_block1 0xFFC02B00 0xFFC02B58
i_i2c_emac_2_DW_apb_i2c_addr_block1 0xFFC02C00 0xFFC02C58

Size: 32

Offset: 0x58

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_DONE

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_DONE

RO 0x0

CLR_RX_DONE

RO 0x0

IC_CLR_RX_DONE Fields

Bit Name Description Access Reset
31:1 RSVD_IC_CLR_RX_DONE
Reserved bits - Read Only
RO 0x0
0 CLR_RX_DONE
Read this register to clear the RX_DONE
interrupt (bit 7) of the IC_RAW_INTR_STAT register.
Reset value: 0x0
RO 0x0