ddr_T_main_Probe_Counters_1_AlarmMode

         DDR Main Probe Counter 1 Alarm Mode Register
      
Module Instance Base Address Register Address
soc_ddr_scheduler_inst_0_ddr_T_main_Probe 0xF8000000 0xF8000150

Size: 32

Offset: 0x150

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

COUNTERS_1_ALARMMODE

RW 0x0

ddr_T_main_Probe_Counters_1_AlarmMode Fields

Bit Name Description Access Reset
1:0 COUNTERS_1_ALARMMODE
Register AlarmMode is a 2-bit register that is present when parameter statisticsCounterAlarm is set to True. The register defines the statistics-alarm behavior of the counter.
RW 0x0