ERRINTENR

         Error Interrupt reset.
      
Module Instance Base Address Register Address
soc_hmc_adp_csr_inst_0_ocp_slv_block 0xF8011000 0xF8011118

Size: 32

Offset: 0x118

Access: RW

Access mode: PRIVILEGEMODE

Note: The processor must make a privileged bus access to this register. You can configure processor mode settings in the control registers of the ARM Cortex-A53 MPcore processor. For more information about processor modes, please refer to the ARM Infocenter.

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

SEQ2CORE_INTRR

0x0

HMI_INTRR

0x0

DERRINTR

0x0

SERRINTR

0x0

ERRINTENR Fields

Bit Name Description Access Reset
3 SEQ2CORE_INTRR
This bit is used to reset the seq2core interrupt bit.
1’b0: Writing of zero has no effect.
1’b1: By writing one, this bit will reset SEQ2CORE_INTREN bit to 0. 
This is performing a bitwise writing of this feature.
Value Description
0 STAY
1 RESET
RW 0x0
2 HMI_INTRR
This bit is used to reset the general purpose HMI interrupt error interrupt to system manager
1’b0: Writing of zero has no effect.
1’b1: By writing one, this bit will reset HMI_INTREN bit to 0.
This is performing a bitwise writing of this feature.
Value Description
0 STAY
1 RESET
RW 0x0
1 DERRINTR
This bit is used to reset the double-bit error interrupt bit.
Reads reflect DERRINTEN.
1’b0: Writing of zero has no effect.
1’b1: By writing one, this bit will reset DERRINTEN bit to 0. 
This is performing a bitwise writing of this feature.
Value Description
0 STAY
1 RESET
RW 0x0
0 SERRINTR
This bit is used to reset the single-bit error interrupt bit.
Reads reflect SERRINTEN.
1’b0: Writing of zero has no effect.
1’b1: By writing one, this bit will reset SERRINTEN bit to 0. 
This is performing a bitwise writing of this feature.
Value Description
0 STAY
1 RESET
RW 0x0