This register applies another level of port priority after a transaction is placed in the single port queue.
Module Instance Base Address Register Address
sdr 0xFFC20000 0xFFC250E0

Offset: 0x50E0

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0



RW 0x0

remappriority Fields

Bit Name Description Access Reset
7:0 priorityremap

Each bit of this field represents a priority level. If bit N in the priorityremap field is set, then any port transaction with absolute user priority of N jumps to the front of the single port queue and is serviced ahead of any tranactions in the queue. For example, if bit 5 is set in the priorityremap field of the remappriority register, then any port transaction with a userpriority value of 0x5 in the mppriority register is serviced ahead of any other transaction already in the single port queue.

RW 0x0