Message Interface Group Register Descriptions

These registers provide indirect read and write access for the host CPU to the Message RAM. Buffers the data to be transferred to and from the RAM, avoiding conflicts between CPU accesses and CAN frame reception/transmission. The function of the two Interface Register sets is identical. The second interface register set is provided to serve application programming. Two groups of software drivers may defined, each group is restricted to the use of one of the Interface Register sets. The software drivers of one group may interrupt software drivers of the other group, but not of the same group. In a simple example, there is one Read_Message task that uses IF1 to get received messages from the Message RAM and there is one Write_Message task that uses IF2 to write messages to be transmitted into the Message RAM. Both tasks may interrupt each other. Each set of Interface Registers consists controlled by their own Command Registers. The Command Mask Register specifies the direction of the data transfer and which parts of a Message Object will be transferred. The Command Request Register is used to select a Message Object in the Message RAM as target or source for the transfer and to start the action specified in the Command Mask Register.

Offset: 0x100