This register controls the direction of the data word for the half-duplex Microwire serial protocol. It is impossible to write to this register when the SPI Slave is enabled. The SPI Slave is enabled and disabled by writing to the SPIENR register.
Module Instance Base Address Register Address
spis0 0xFFE02000 0xFFE0200C
spis1 0xFFE03000 0xFFE0300C

Offset: 0xC

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0



RW 0x0


RW 0x0

mwcr Fields

Bit Name Description Access Reset
1 mdd

Defines the direction of the data word when the Microwire serial protocol is used.

Value Description
0x0 SPI Slave receives data
0x1 SPI Slave transmits data
RW 0x0
0 mwmod

Defines whether the Microwire transfer is sequential or non-sequential. When sequential mode is used, only one control word is needed to transmit or receive a block of data words. When non-sequential mode is used, there must be a control word for each data word that is transmitted or received.

Value Description
0x0 non-sequential transfer
0x1 sequential transfer
RW 0x0