This register holds the size and memory start address of IN endpoint TxFIFOs implemented in Device mode. Each FIFO holds the data for one IN endpoint. This register is repeated for each instantiated IN endpoint FIFO. For IN endpoint FIFO 0 use GNPTXFSIZ register for programming the size and memory start address.
Module Instance Base Address Register Address
usb0 0xFFB00000 0xFFB00124
usb1 0xFFB40000 0xFFB40124

Offset: 0x124

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16



RW 0x2000

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0


RW 0x4000

dieptxf9 Fields

Bit Name Description Access Reset
29:16 inepntxfdep

This value is in terms of 32-bit words. Minimum value is 16 Maximum value is 8192.

RW 0x2000
15:0 inepntxfstaddr

This field contains the memory start address for IN endpoint Transmit FIFO 9.

RW 0x4000