FPGA Slaves Accessed Via Lightweight HPS2FPGA AXI Bridge (lwfpgaslaves) Address Map

This address space is allocated for FPGA-configured slaves driven by the lightweight HPS-to-FPGA bridge master. Address assignment within this space is user-defined. For more information about Lightweight HPS-to-FPGA bridges, refer to the HPS-FPGA Bridges chapter of the Hard Processor System Technical Reference Manual.

Table 1. lwfpgaslaves Address Range
Module Instance Start Address End Address