System Manager Module Summary

Registers in the System Manager module

Base Address: 0xFFD08000

Register

Address Offset

Bit Fields

siliconid1

0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

id

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rev

RO 0x1

siliconid2

0x4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

rsv

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rsv

RO 0x0

wddbg

0x10

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

mode_1

RW 0x3

mode_0

RW 0x3

bootinfo

0x14

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

pincsel

RO 0x0

pinbsel

RO 0x0

csel

RO 0x0

bsel

RO 0x0

hpsinfo

0x18

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

can

RO 0x0

dualcore

RO 0x0

parityinj

0x1C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

btac_1

RW 0x0

btac_0

RW 0x0

ghb_1

RW 0x0

ghb_0

RW 0x0

ictag_1

RW 0x0

ictag_0

RW 0x0

icdata_1

RW 0x0

icdata_0

RW 0x0

maintlb_1

RW 0x0

maintlb_0

RW 0x0

dcouter_1

RW 0x0

dcouter_0

RW 0x0

dctag_1

RW 0x0

dctag_0

RW 0x0

dcdata_1

RW 0x0

dcdata_0

RW 0x0

FPGA Interface Group

gbl

0x20

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

intf

RW 0x1

indiv

0x24

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

crosstrigintf

RW 0x1

stmeventintf

RW 0x1

Reserved

traceintf

RW 0x1

bscanintf

RW 0x1

configiointf

RW 0x1

jtagenintf

RW 0x1

rstreqintf

RW 0x1

module

0x28

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sdmmc

RW 0x0

Reserved

emac_1

RW 0x0

emac_0

RW 0x0

spim_1

RW 0x0

spim_0

RW 0x0

Scan Manager Group

ctrl

0x30

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

fpgajtagen

RW 0x0

Freeze Control Group

vioctrl

0x40

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

slew

RW 0x0

wkpullup

RW 0x0

tristate

RW 0x0

bushold

RW 0x0

cfg

RW 0x0

hioctrl

0x50

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

oct_cfgen_calstart

RW 0x0

regrst

RW 0x1

octrst

RW 0x1

dllrst

RW 0x1

slew

RW 0x0

wkpullup

RW 0x0

tristate

RW 0x0

bushold

RW 0x0

cfg

RW 0x0

src

0x54

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

vio1

RW 0x0

hwctrl

0x58

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

vio1state

RO 0x2

vio1req

RW 0x1

EMAC Group

ctrl

0x60

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

ptpclksel_1

RW 0x0

ptpclksel_0

RW 0x0

physel_1

RW 0x2

physel_0

RW 0x2

l3master

0x64

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

awcache_1

RW 0x0

awcache_0

RW 0x0

arcache_1

RW 0x0

arcache_0

RW 0x0

DMA Controller Group

ctrl

0x70

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

irqnonsecure

RW 0x0

mgrnonsecure

RW 0x0

chansel_3

RW 0x0

chansel_2

RW 0x0

chansel_1

RW 0x0

chansel_0

RW 0x0

persecurity

0x74

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

nonsecure

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

nonsecure

RW 0x0

Preloader (initial software) Group

handoff

0x80

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

value

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RW 0x0

Boot ROM Code Register Group

ctrl

0xC0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

warmrstcfgio

RW 0x0

warmrstcfgpinmux

RW 0x0

cpu1startaddr

0xC4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

value

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RW 0x0

initswstate

0xC8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

value

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RW 0x0

initswlastld

0xCC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

index

RW 0x0

bootromswstate

0xD0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

value

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RW 0x0

Warm Boot from On-Chip RAM Group

enable

0xE0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

magic

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

magic

RW 0x0

datastart

0xE4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset

RW 0x0

length

0xE8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

size

RW 0x0

execution

0xEC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset

RW 0x0

crc

0xF0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

expected

RW 0xE763552A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

expected

RW 0xE763552A

Boot ROM Hardware Register Group

ctrl

0x100

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

ensfmdwru

RW 0x1

waitstate

RW 0x0

SDMMC Controller Group

ctrl

0x108

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

fbclksel

RW 0x0

smplsel

RW 0x0

drvsel

RW 0x0

l3master

0x10C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

hprotcache_0

RW 0x0

hprotbuff_0

RW 0x0

hprotpriv_0

RW 0x1

hprotdata_0

RW 0x1

NAND Flash Controller Register Group

bootstrap

0x110

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

tworowaddr

RW 0x0

noloadb0p0

RW 0x0

page512

RW 0x0

noinit

RW 0x0

l3master

0x114

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

awcache_0

RW 0x0

arcache_0

RW 0x0

USB Controller Group

l3master

0x118

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

hprotcache_1

RW 0x0

hprotcache_0

RW 0x0

hprotbuff_1

RW 0x0

hprotbuff_0

RW 0x0

hprotpriv_1

RW 0x1

hprotpriv_0

RW 0x1

hprotdata_1

RW 0x1

hprotdata_0

RW 0x1

ECC Management Register Group

l2

0x140

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

ocram

0x144

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

usb0

0x148

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

usb1

0x14C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

emac0

0x150

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rxfifoderr

RW 0x0

rxfifoserr

RW 0x0

txfifoderr

RW 0x0

txfifoserr

RW 0x0

rxfifoinjd

RW 0x0

rxfifoinjs

RW 0x0

txfifoinjd

RW 0x0

txfifoinjs

RW 0x0

en

RW 0x0

emac1

0x154

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rxfifoderr

RW 0x0

rxfifoserr

RW 0x0

txfifoderr

RW 0x0

txfifoserr

RW 0x0

rxfifoinjd

RW 0x0

rxfifoinjs

RW 0x0

txfifoinjd

RW 0x0

txfifoinjs

RW 0x0

en

RW 0x0

dma

0x158

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

can0

0x15C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

can1

0x160

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

nand

0x164

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rdfifoderr

RW 0x0

rdfifoserr

RW 0x0

wrfifoderr

RW 0x0

wrfifoserr

RW 0x0

eccbufderr

RW 0x0

eccbufserr

RW 0x0

rdfifoinjd

RW 0x0

rdfifoinjs

RW 0x0

wrfifoinjd

RW 0x0

wrfifoinjs

RW 0x0

eccbufinjd

RW 0x0

eccbufinjs

RW 0x0

en

RW 0x0

qspi

0x168

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derr

RW 0x0

serr

RW 0x0

injd

RW 0x0

injs

RW 0x0

en

RW 0x0

sdmmc

0x16C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

derrportb

RW 0x0

serrportb

RW 0x0

derrporta

RW 0x0

serrporta

RW 0x0

injdportb

RW 0x0

injsportb

RW 0x0

injdporta

RW 0x0

injsporta

RW 0x0

en

RW 0x0

Pin Mux Control Group

EMACIO0

0x400

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO1

0x404

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO2

0x408

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO3

0x40C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO4

0x410

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO5

0x414

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO6

0x418

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO7

0x41C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO8

0x420

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO9

0x424

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO10

0x428

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO11

0x42C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO12

0x430

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

EMACIO13

0x434

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO0

0x450

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO1

0x454

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO2

0x458

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO3

0x45C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO4

0x460

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO5

0x464

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO6

0x468

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO7

0x46C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO8

0x470

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO9

0x474

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO10

0x478

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

FLASHIO11

0x47C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO0

0x480

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO1

0x484

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO2

0x488

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO3

0x48C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO4

0x490

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO5

0x494

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO6

0x498

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO7

0x49C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO8

0x4A0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO9

0x4A4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO10

0x4A8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO11

0x4AC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO12

0x4B0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO13

0x4B4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO14

0x4B8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO15

0x4BC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO16

0x4C0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO17

0x4C4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO18

0x4C8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

GENERALIO28

0x4F0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO0

0x500

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO1

0x504

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO2

0x508

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO3

0x50C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO4

0x510

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

RW 0x0

MIXED1IO5

0x514

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

sel

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