wdt_torr

Contains fields that determine the watchdog timeout.
Module Instance Base Address Register Address
l4wd0 0xFFD02000 0xFFD02004
l4wd1 0xFFD03000 0xFFD03004

Offset: 0x4

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

top_init

RW 0xF

top

RW 0xF

wdt_torr Fields

Bit Name Description Access Reset
7:4 top_init

Used to select the timeout period that the watchdog counter restarts from for the first counter restart (kick). This register should be written after reset and before the watchdog is enabled. A change of the TOP_INIT is seen only once the watchdog has been enabled, and any change after the first kick is not seen as subsequent kicks use the period specified by the TOP bits. The timeout period (in clocks) is: t = 2**(16 + top_init)

Value Description
0x0 Timeout = 65536 osc1_clk
0x1 Timeout = 131072 osc1_clk
0x2 Timeout = 262144 osc1_clk
0x3 Timeout = 524288 osc1_clk
0x4 Timeout = 1048576 osc1_clk
0x5 Timeout = 2097152 osc1_clk
0x6 Timeout = 4194304 osc1_clk
0x7 Timeout = 8388608 osc1_clk
0x8 Timeout = 16777216 osc1_clk
0x9 Timeout = 33554432 osc1_clk
0xa Timeout = 67108864 osc1_clk
0xb Timeout = 134217728 osc1_clk
0xc Timeout = 268435456 osc1_clk
0xd Timeout = 536870912 osc1_clk
0xe Timeout = 1073741824 osc1_clk
0xf Timeout = 2147483648 osc1_clk
RW 0xF
3:0 top

This field is used to select the timeout period from which the watchdog counter restarts. A change of the timeout period takes effect only after the next counter restart (kick). The timeout period (in clocks) is: t = 2**(16 + top)

Value Description
0x0 Timeout = 65536 osc1_clk
0x1 Timeout = 131072 osc1_clk
0x2 Timeout = 262144 osc1_clk
0x3 Timeout = 524288 osc1_clk
0x4 Timeout = 1048576 osc1_clk
0x5 Timeout = 2097152 osc1_clk
0x6 Timeout = 4194304 osc1_clk
0x7 Timeout = 8388608 osc1_clk
0x8 Timeout = 16777216 osc1_clk
0x9 Timeout = 33554432 osc1_clk
0xa Timeout = 67108864 osc1_clk
0xb Timeout = 134217728 osc1_clk
0xc Timeout = 268435456 osc1_clk
0xd Timeout = 536870912 osc1_clk
0xe Timeout = 1073741824 osc1_clk
0xf Timeout = 2147483648 osc1_clk
RW 0xF