wdt_cr

Contains fields that control operating functions.
Module Instance Base Address Register Address
l4wd0 0xFFD02000 0xFFD02000
l4wd1 0xFFD03000 0xFFD03000

Offset: 0x0

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rmod

RW 0x1

wdt_en

RW 0x0

wdt_cr Fields

Bit Name Description Access Reset
1 rmod

Selects the output response generated to a timeout.

Value Description
0x0 Generate a warm reset request
0x1 First generate an interrupt, and if it is not cleared by the time a second timeout occurs, then generate a warm reset request.
RW 0x1
0 wdt_en

This bit is used to enable and disable the watchdog. When disabled, the counter does not decrement. Thus, no interrupts or warm reset requests are generated. Once this bit has been enabled, it can only be cleared only by resetting the watchdog.

Value Description
0x0 Watchdog disabled
0x1 Watchdog enabled
RW 0x0