timer1eoi
Clears Timer1 interrupt when read.
| Module Instance | Base Address | Register Address |
|---|---|---|
| sptimer0 | 0xFFC08000 | 0xFFC0800C |
| sptimer1 | 0xFFC09000 | 0xFFC0900C |
| osc1timer0 | 0xFFD00000 | 0xFFD0000C |
| osc1timer1 | 0xFFD01000 | 0xFFD0100C |
Offset: 0xC
Access: RO
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
timer1eoi RO 0x0 |
||||||||||||||
timer1eoi Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 0 | timer1eoi | Reading from this register clears the interrupt from Timer1 and returns 0. |
RO | 0x0 |