ghwcfg3

This register contains the configuration options.
Module Instance Base Address Register Address
usb0 0xFFB00000 0xFFB0004C
usb1 0xFFB40000 0xFFB4004C

Offset: 0x4C

Access: RO

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

dfifodepth

RO 0x1F80
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

lpmmode

RO 0x0

bcsupport

RO 0x0

hsicmode

RO 0x0

adpsupport

RO 0x0

rsttype

RO 0x0

optfeature

RO 0x0

vndctlsupt

RO 0x1

i2cintsel

RO 0x0

otgen

RO 0x1

pktsizewidth

RO 0x6

xfersizewidth

RO 0x8

ghwcfg3 Fields

Bit Name Description Access Reset
31:16 dfifodepth

DFIFO Depth. This value is in terms of 35-bit words. Minimum value is 32 Maximum value is 8192

 RO 0x1F80
15 lpmmode

LPM Mode Enabled/Disabled.

Value Description
0x0 LPM disabled
RO 0x0
14 bcsupport

Battery Charger Support.

Value Description
0x0 No Battery Charger Support
RO 0x0
13 hsicmode

Supports HSIC and Non-HSIC Modes.

Value Description
0x0 Non-HSIC-capable
RO 0x0
12 adpsupport

ADP logic support.

Value Description
0x1 ADP logic is present along with HSOTG controller
RO 0x0
11 rsttype

Defines what reset type is used in the core.

Value Description
0x0 Asynchronous reset is used in the core
RO 0x0
10 optfeature

User ID register, GPIO interface ports, and SOF toggle and counter ports were removed.

Value Description
0x0 No Optional features
RO 0x0
9 vndctlsupt

ULPI PHY internal registers can be accessed by software using register reads/writes to otg

Value Description
0x1 Vendor Control Interface is not available on the
RO 0x1
8 i2cintsel

I2C Interface not used.

Value Description
0x0 I2C Interface
RO 0x0
7 otgen

HNP and SRP Capable OTG (Device and Host)

Value Description
0x1 OTG Capable
RO 0x1
6:4 pktsizewidth

Value Description
0x0 Width of Packet Size Counter 4
0x1 Width of Packet Size Counter 5
0x2 Width of Packet Size Counter 6
0x3 Width of Packet Size Counter 7
0x4 Width of Packet Size Counter 8
0x5 Width of Packet Size Counter 9
0x6 Width of Packet Size Counter 10
RO 0x6
3:0 xfersizewidth

Width variable from 11 to 19 bits.

Value Description
0x0 Width of Transfer Size Counter 11 bits
0x1 Width of Transfer Size Counter 12 bits
0x2 Width of Transfer Size Counter 13 bits
0x3 Width of Transfer Size Counter 14 bits
0x4 Width of Transfer Size Counter 15 bits
0x5 Width of Transfer Size Counter 16 bits
0x6 Width of Transfer Size Counter 17 bits
0x7 Width of Transfer Size Counter 18 bits
0x8 Width of Transfer Size Counter 19 bits
RO 0x8