MMC_Receive_Interrupt_Mask

The MMC Receive Interrupt Mask register maintains the masks for the interrupts generated when the receive statistic counters reach half of their maximum value, or maximum value. This register is 32-bits wide.
Module Instance Base Address Register Address
emac0 0xFF700000 0xFF70010C
emac1 0xFF702000 0xFF70210C

Offset: 0x10C

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

rxctrlfim

RW 0x0

rxrcverrfim

RW 0x0

rxwdogfim

RW 0x0

rxvlangbfim

RW 0x0

rxfovfim

RW 0x0

rxpausfim

RW 0x0

rxorangefim

RW 0x0

rxlenerfim

RW 0x0

rxucgfim

RW 0x0

rx1024tmaxoctgbfim

RW 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rx512t1023octgbfim

RW 0x0

rx256t511octgbfim

RW 0x0

rx128t255octgbfim

RW 0x0

rx65t127octgbfim

RW 0x0

rx64octgbfim

RW 0x0

rxosizegfim

RW 0x0

rxusizegfim

RW 0x0

rxjaberfim

RW 0x0

rxruntfim

RW 0x0

rxalgnerfim

RW 0x0

rxcrcerfim

RW 0x0

rxmcgfim

RW 0x0

rxbcgfim

RW 0x0

rxgoctim

RW 0x0

rxgboctim

RW 0x0

rxgbfrmim

RW 0x0

MMC_Receive_Interrupt_Mask Fields

Bit Name Description Access Reset
25 rxctrlfim

Setting this bit masks the interrupt when the rxctrlframes counter reaches half the maximum value, and also when it reaches the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
24 rxrcverrfim

Setting this bit masks the interrupt when the rxrcverror error counter reaches half the maximum value, and also when it reaches the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
23 rxwdogfim

Setting this bit masks the interrupt when the rxwatchdog counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
22 rxvlangbfim

Setting this bit masks the interrupt when the rxvlanframes_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
21 rxfovfim

Setting this bit masks the interrupt when the rxfifooverflow counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
20 rxpausfim

Setting this bit masks the interrupt when the rxpauseframes counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
19 rxorangefim

Setting this bit masks the interrupt when the rxoutofrangetype counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
18 rxlenerfim

Setting this bit masks the interrupt when the rxlengtherror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
17 rxucgfim

Setting this bit masks the interrupt when the rxunicastframes_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
16 rx1024tmaxoctgbfim

Setting this bit masks the interrupt when the rx1024tomaxoctets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
15 rx512t1023octgbfim

Setting this bit masks the interrupt when the rx512to1023octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
14 rx256t511octgbfim

Setting this bit masks the interrupt when the rx256to511octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
13 rx128t255octgbfim

Setting this bit masks the interrupt when the rx128to255octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
12 rx65t127octgbfim

Setting this bit masks the interrupt when the rx65to127octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
11 rx64octgbfim

Setting this bit masks the interrupt when the rx64octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
10 rxosizegfim

Setting this bit masks the interrupt when the rxoversize_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
9 rxusizegfim

Setting this bit masks the interrupt when the rxundersize_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
8 rxjaberfim

Setting this bit masks the interrupt when the rxjabbererror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
7 rxruntfim

Setting this bit masks the interrupt when the rxrunterror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
6 rxalgnerfim

Setting this bit masks the interrupt when the rxalignmenterror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
5 rxcrcerfim

Setting this bit masks the interrupt when the rxcrcerror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
4 rxmcgfim

Setting this bit masks the interrupt when the rxmulticastframes_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
3 rxbcgfim

Setting this bit masks the interrupt when the rxbroadcastframes_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
2 rxgoctim

Setting this bit masks the interrupt when the rxoctetcount_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
1 rxgboctim

Setting this bit masks the interrupt when the rxoctetcount_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0
0 rxgbfrmim

Setting this bit masks the interrupt when the rxframecount_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 counter < half max
0x1 counter >= half max or max
RW 0x0