rxthresh
Device Instruction Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| qspiregs | 0xFF705000 | 0xFF705034 |
Offset: 0x34
Access: RW
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
level RW 0x1 |
||||||||||||||
rxthresh Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 3:0 | level | Defines the level at which the receive FIFO not empty interrupt is generated |
RW | 0x1 |