status

Reports various operting status conditions.
Module Instance Base Address Register Address
sdmmc 0xFF704000 0xFF704048

Offset: 0x48

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

fifo_count

RO 0x0

response_index

RO 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

response_index

RO 0x0

data_state_mc_busy

RO 0x0

data_busy

RO 0x0

data_3_status

RO 0x1

command_fsm_states

RO 0x0

fifo_full

RO 0x0

fifo_empty

RO 0x1

fifo_tx_watermark

RO 0x1

fifo_rx_watermark

RO 0x0

status Fields

Bit Name Description Access Reset
29:17 fifo_count

FIFO count - Number of filled locations in FIFO

 RO 0x0
16:11 response_index

Index of previous response, including any auto-stop sent by core

 RO 0x0
10 data_state_mc_busy

Data transmit or receive state-machine is busy.

Value Description
0x1 Data State MC busy
0x0 Data State MC not busy
RO 0x0
9 data_busy

Inverted version of raw selected card_data[0]. The default can be cardpresent or not present depend on cdata_in.

Value Description
0x1 card data busy
0x0 card data not busy
RO 0x0
8 data_3_status

Raw selected card_data[3]; checks whether card is present. The default can be cardpresent or not present depend on cdata_in.

Value Description
0x1 Card Present
0x0 Card Not Present
RO 0x1
7:4 command_fsm_states

The command FSM state.

Value Description
0x0 Idle, Wait for CCS, Send CCSD, or Boot Mode
0x1 Send init sequence
0x2 Tx cmd start bit
0x3 Tx cmd tx bit
0x4 Tx cmd index + arg
0x5 Tx cmd crc7
0x6 Tx cmd end bit
0x7 Rx resp start bit
0x8 Rx resp IRQ response
0x9 Rx resp tx bit
0xa Rx resp cmd idx
0xb Rx resp data
0xc Rx resp crc7
0xd Rx resp end bit
0xe Cmd path wait NCC
0xf Wait: CMD-to-reponse turnaround
RO 0x0
3 fifo_full

FIFO is full status.

Value Description
0x0 FIFO is full
0x1 FIFO is not full
RO 0x0
2 fifo_empty

FIFO is empty status.

Value Description
0x1 FIFO is empty
0x0 FIFO not empty
RO 0x1
1 fifo_tx_watermark

FIFO reached Transmit watermark level; not qualified with data transfer.

Value Description
0x1 FIFO reached transmit watermark level: not qualified with data transfer.
0x0 FIFO not at transmit watermark Level
RO 0x1
0 fifo_rx_watermark

FIFO reached Receive watermark level; not qualified with data transfer

Value Description
0x0 FIFO reached watermark level; not qualified with data transfer.
0x1 FIFO not at watermark Level
RO 0x0