flash_burst_length

Module Instance	Base Address	Register Address
`nandregs`	`0xFFB80000`	`0xFFB80770`

Offset: 0x770

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`reserved` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`reserved` `RW 0x0`								`Reserved`			`continous_burst` `RW 0x0`	`Reserved`		`value` `RW 0x1`

flash_burst_length Fields

Bit	Name	Description	Access	Reset
31:8	`reserved`	Reserved	`RW`	`0x0`
4	`continous_burst`	When this bit is set, the Data DMA will burst the entire page from/to the flash device. Please make sure that the host system can provide/sink data at a fast pace to avoid unnecessary pausing of data on the device interface.	`RW`	`0x0`
1:0	`value`	Sets the burst used by data dma for transferring data to/from flash device. This burst length is different and is larger than the burst length on the host bus so that larger amount of data can be transferred to/from device, descreasing controller data transfer overhead in the process. 00 - 64 bytes, 01 - 128 bytes, 10 - 256 bytes, 11 - 512 bytes. The host burst size multiplied by the number of outstanding requests on the host side should be greater than equal to this value. If not, the device side burst length will be equal to host side burst length.	`RW`	`0x1`