cache_write_enable

Device supports cache write command sequence
Module Instance Base Address Register Address
nandregs 0xFFB80000 0xFFB800A0

Offset: 0xA0

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

flag

RW 0x0

cache_write_enable Fields

Bit Name Description Access Reset
0 flag

[list][*]1 - Cache write supported [*]0 - Cache write not supported[/list]

RW 0x0