L4 SP Register Descriptions Registers associated with the L4 SP master. This master is used to access the APB slaves on the L4 SP bus. Offset: 0x1000 fn_mod_bm_iss Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding transactions. Related reference L4 MAIN Register Descriptions L4 MP Register Descriptions L4 OSC1 Register Descriptions L4 SPIM Register Descriptions STM Register Descriptions LWHPS2FPGA Register Descriptions USB1 Register Descriptions NANDDATA Register Descriptions USB0 Register Descriptions NANDREGS Register Descriptions QSPIDATA Register Descriptions FPGAMGRDATA Register Descriptions HPS2FPGA Register Descriptions ACP Register Descriptions Boot ROM Register Descriptions On-chip RAM Register Descriptions