l4main

Controls security settings for L4 main peripherals
Module Instance Base Address Register Address
l3regs 0xFF800000 0xFF800008

Offset: 0x8

Access: WO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

dmanonsecure

WO 0x0

dmasecure

WO 0x0

spis1

WO 0x0

spis0

WO 0x0

l4main Fields

Bit Name Description Access Reset
3 dmanonsecure

Controls whether secure or non-secure masters can access the DMA Non-secure slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
2 dmasecure

Controls whether secure or non-secure masters can access the DMA Secure slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
1 spis1

Controls whether secure or non-secure masters can access the SPI Slave 1 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0
0 spis0

Controls whether secure or non-secure masters can access the SPI Slave 0 slave.

Value Description
0x0 The slave can only be accessed by a secure master.
0x1 The slave can only be accessed by a secure or non-secure masters.
WO 0x0