periph_id_3

Peripheral ID3
Module Instance Base Address Register Address
fpga2hpsregs 0xFF600000 0xFF601FEC

Offset: 0x1FEC

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rev_and

RO 0x0

cust_mod_num

RO 0x0

periph_id_3 Fields

Bit Name Description Access Reset
7:4 rev_and

Revision

RO 0x0
3:0 cust_mod_num

Customer Model Number

RO 0x0