per2modrst

The PER2MODRST register is used by software to trigger module resets (individual module reset signals). Software explicitly asserts and de-asserts module reset signals by writing bits in the appropriate *MODRST register. It is up to software to ensure module reset signals are asserted for the appropriate length of time and are de-asserted in the correct order. It is also up to software to not assert a module reset signal that would prevent software from de-asserting the module reset signal. For example, software should not assert the module reset to the CPU executing the software. Software writes a bit to 1 to assert the module reset signal and to 0 to de-assert the module reset signal. All fields are reset by a cold or warm reset. The reset value of all fields is 1. This holds the corresponding module in reset until software is ready to release the module from reset by writing 0 to its field.
Module Instance Base Address Register Address
rstmgr 0xFFD05000 0xFFD05018

Offset: 0x18

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

dmaif7

RW 0x1

dmaif6

RW 0x1

dmaif5

RW 0x1

dmaif4

RW 0x1

dmaif3

RW 0x1

dmaif2

RW 0x1

dmaif1

RW 0x1

dmaif0

RW 0x1

per2modrst Fields

Bit Name Description Access Reset
7 dmaif7

Resets DMA channel 7 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
6 dmaif6

Resets DMA channel 6 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
5 dmaif5

Resets DMA channel 5 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
4 dmaif4

Resets DMA channel 4 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
3 dmaif3

Resets DMA channel 3 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
2 dmaif2

Resets DMA channel 2 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
1 dmaif1

Resets DMA channel 1 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1
0 dmaif0

Resets DMA channel 0 interface adapter between FPGA Fabric and HPS DMA Controller

 RW 0x1