mpweight_1_4

This register is used to configure the DRAM burst operation scheduling.
Module Instance Base Address Register Address
sdr 0xFFC20000 0xFFC250B4

Offset: 0x50B4

Access: RW

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

sumofweights_13_0

RW 0x0

staticweight_49_32

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

staticweight_49_32

RW 0x0

mpweight_1_4 Fields

Bit Name Description Access Reset
31:18 sumofweights_13_0

Set the sum of static weights for particular user priority. This register is used as part of the deficit round robin implementation. It should be set to the sum of the weights for the ports

RW 0x0
17:0 staticweight_49_32

Set static weight of the port. Each port is programmed with a 5 bit value. Port 0 is bits 4:0, port 1 is bits 9:5, up to port 9 being bits 49:45

RW 0x0