gpio_ext_porta

This GPIO register is used to read input data. Check the GPIO chapter in the Technical Reference Manual for details on how GPIO2 is implemented.
Module Instance Base Address Register Address
gpio0 0xFF708000 0xFF708050
gpio1 0xFF709000 0xFF709050
gpio2 0xFF70A000 0xFF70A050

Offset: 0x50

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

gpio_ext_porta

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gpio_ext_porta

RO 0x0

gpio_ext_porta Fields

Bit Name Description Access Reset
28:0 gpio_ext_porta

When Port A Data Register is configured as Input, then reading this location reads the values on the signals. When the data direction of Port A Data Register is set as Output, reading this location reads Port A Data Register. Note that only bits[26:0] are implemented for gpio2.

RO 0x0