gpio_debounce

Debounces each IO Pin
Module Instance Base Address Register Address
gpio0 0xFF708000 0xFF708048
gpio1 0xFF709000 0xFF709048
gpio2 0xFF70A000 0xFF70A048

Offset: 0x48

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

gpio_debounce

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

gpio_debounce

RW 0x0

gpio_debounce Fields

Bit Name Description Access Reset
28:0 gpio_debounce

Controls whether an external signal that is the source of an interrupt needs to be debounced to remove any spurious glitches. A signal must be valid for two periods of an external clock (gpio_db_clk) before it is internally processed. Note that only bits[26:0] are implemented for gpio2.

Value Description
0x0 No debounce
0x1 Enable debounce
RW 0x0