haint
When a significant event occurs on a channel, the Host All Channels Interrupt register interrupts the application using the Host Channels Interrupt bit of the Core Interrupt register (GINTSTS.HChInt). There is one interrupt bit per channel, up to a maximum of 16 bits. Bits in this register are set and cleared when the application sets and clears bits in the corresponding Host Channel-n Interrupt register.
| Module Instance | Base Address | Register Address |
|---|---|---|
| usb0 | 0xFFB00000 | 0xFFB00414 |
| usb1 | 0xFFB40000 | 0xFFB40414 |
Offset: 0x414
Access: RO
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
haint RO 0x0 |
|||||||||||||||
haint Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 15:0 | haint | One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15 |
RO | 0x0 |