gotgint

The application reads this register whenever there is an OTG interrupt and clears the bits in this register to clear the OTG interrupt.
Module Instance Base Address Register Address
usb0 0xFFB00000 0xFFB00004
usb1 0xFFB40000 0xFFB40004

Offset: 0x4

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

dbncedone

RO 0x0

adevtoutchg

RO 0x0

hstnegdet

RO 0x0

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

hstnegsucstschng

RO 0x0

sesreqsucstschng

RO 0x0

Reserved

sesenddet

RO 0x0

Reserved

gotgint Fields

Bit Name Description Access Reset
19 dbncedone

Mode: Host only. The core sets this bit when the debounce is completed after the device connect. The application can start driving USB reset after seeing this interrupt. This bit is only valid when the HNP Capable or SRP Capable bit is SET in the Core USB Configuration register (GUSBCFG.HNPCap or GUSBCFG.SRPCap, respectively). This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 No Change
0x1 Debounce completed
RO 0x0
18 adevtoutchg

Mode:Host and Device. The core sets this bit to indicate that the A-device has timed out WHILE waiting FOR the B-device to connect. This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 No Change
0x1 A-Device Timeout
RO 0x0
17 hstnegdet

Mode:Host and Device. The core sets this bit when it detects a host negotiation request on the USB. This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 No Change
0x1 Host Negotiation Detected
RO 0x0
9 hstnegsucstschng

Mode: Host and Device. The core sets this bit on the success or failure of a USB host negotiation request. The application must read the Host Negotiation Success bit of the OTG Control and Status register (GOTGCTL.HstNegScs) to check for success or failure. This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 No Change
0x1 Host Negotiation Status Change
RO 0x0
8 sesreqsucstschng

Mode: Host and Device. The core sets this bit on the success or failure of a session request. The application must read the Session Request Success bit in the OTG Control and Status register (GOTGCTL.SesReqScs) to check for success or failure. This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 No change
0x1 Session Request Status
RO 0x0
2 sesenddet

Mode:Host and Device.This bit can be set only by the core and the application should write 1 to clear it.

Value Description
0x0 Non Active State
0x1 Set when utmisrp_bvalid signal is deasserted
RO 0x0