tbbcnt
Tracks number of bytes transferred between Host and FIFO.
| Module Instance | Base Address | Register Address |
|---|---|---|
| sdmmc | 0xFF704000 | 0xFF704060 |
Offset: 0x60
Access: RO
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
trans_fifo_byte_count RO 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
trans_fifo_byte_count RO 0x0 |
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tbbcnt Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:0 | trans_fifo_byte_count | Number of bytes transferred between Host/DMA memory and BIU FIFO. In 32-bit AMBA data-bus-width modes, register should be accessed in full to avoid read-coherency problems. Both TCBCNT and TBBCNT share same coherency register. |
RO | 0x0 |