ctrl

Registers used by the DMA Controller. All fields are reset by a cold or warm reset. These register bits should be updated during system initialization prior to removing the DMA controller from reset. They may not be changed dynamically during DMA operation.
Module Instance Base Address Register Address
sysmgr 0xFFD08000 0xFFD08070

Offset: 0x70

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

irqnonsecure

RW 0x0

mgrnonsecure

RW 0x0

chansel_3

RW 0x0

chansel_2

RW 0x0

chansel_1

RW 0x0

chansel_0

RW 0x0

ctrl Fields

Bit Name Description Access Reset
12:5 irqnonsecure

Specifies the security state of an event-interrupt resource. If bit index [x] is 0, the DMAC assigns event<x> or irq[x] to the Secure state. If bit index [x] is 1, the DMAC assigns event<x> or irq[x] to the Non-secure state.

RW 0x0
4 mgrnonsecure

Specifies the security state of the DMA manager thread. 0 = assigns DMA manager to the Secure state. 1 = assigns DMA manager to the Non-secure state. Sampled by the DMA controller when it exits from reset.

RW 0x0
3 chansel_3

Controls mux that selects whether FPGA or CAN connects to one of the DMA peripheral request interfaces.The peripheral request interface index equals the array index + 4. For example, array index 0 is for peripheral request index 4.

Value Description
0x0 FPGA drives peripheral request interface
0x1 CAN drives peripheral request interface
RW 0x0
2 chansel_2

Controls mux that selects whether FPGA or CAN connects to one of the DMA peripheral request interfaces.The peripheral request interface index equals the array index + 4. For example, array index 0 is for peripheral request index 4.

Value Description
0x0 FPGA drives peripheral request interface
0x1 CAN drives peripheral request interface
RW 0x0
1 chansel_1

Controls mux that selects whether FPGA or CAN connects to one of the DMA peripheral request interfaces.The peripheral request interface index equals the array index + 4. For example, array index 0 is for peripheral request index 4.

Value Description
0x0 FPGA drives peripheral request interface
0x1 CAN drives peripheral request interface
RW 0x0
0 chansel_0

Controls mux that selects whether FPGA or CAN connects to one of the DMA peripheral request interfaces.The peripheral request interface index equals the array index + 4. For example, array index 0 is for peripheral request index 4.

Value Description
0x0 FPGA drives peripheral request interface
0x1 CAN drives peripheral request interface
RW 0x0