hwctrl
Activate freeze or thaw operations on VIO channel 1 (HPS IO bank 2 and bank 3) and monitor for completeness and the current state.
These fields interact with the hardware state machine in the Freeze Controller. These fields can be accessed independent of the value of SRC1.VIO1 although they only have an effect on the VIO channel 1 freeze signals when SRC1.VIO1 is setup to have the hardware state machine be the freeze signal source.
All fields are only reset by a cold reset (ignore warm reset).
| Module Instance | Base Address | Register Address |
|---|---|---|
| sysmgr | 0xFFD08000 | 0xFFD08058 |
Offset: 0x58
Access: RW
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
vio1state RO 0x2 |
vio1req RW 0x1 |
|||||||||||||
hwctrl Fields
| Bit | Name | Description | Access | Reset | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2:1 | vio1state | Software reads this field to determine the current frozen/thawed state of the VIO channel 1 or to determine when a freeze/thaw request is made by writing the corresponding *REQ field in this register has completed. Reset by a cold reset (ignores warm reset).
|
RO | 0x2 | ||||||||||
| 0 | vio1req | Requests hardware state machine to generate freeze signal sequence to transition between frozen and thawed states. If this field is read by software, it contains the value previously written by software (i.e. this field is not written by hardware).
|
RW | 0x1 |