noc_fw_ocram_ocram_scr Address Map

Module Instance	Base Address	End Address
`noc_fw_ocram_ocram_scr`	`0xFFD13200`	`0xFFD132FF`

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Register	Offset	Width	Access	Reset Value	Description
`enable`	`0x0`	`32`	`RW`	`0x0`	Enable
`enable_set`	`0x4`	`32`	`WO`	`0x0`	Sets Region Enable field when written with 1
`enable_clear`	`0x8`	`32`	`WO`	`0x0`	Clears Region Enable field when written with 1
`region0addr`	`0xC`	`32`	`RW`	`0x0`	Base and Limit definition for Region 0
`region1addr`	`0x10`	`32`	`RW`	`0x0`	Base and Limit definition for Region 1
`region2addr`	`0x14`	`32`	`RW`	`0x0`	Base and Limit definition for Region 2
`region3addr`	`0x18`	`32`	`RW`	`0x0`	Base and Limit definition for Region 3
`region4addr`	`0x1C`	`32`	`RW`	`0x0`	Base and Limit definition for Region 4
`region5addr`	`0x20`	`32`	`RW`	`0x0`	Base and Limit definition for Region 5