sys_mgr_rom Address Map

Module Instance Base Address End Address
i_sys_mgr_rom 0xFFD06200 0xFFD06FFF
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Register Offset Width Access Reset Value Description
romhw_ctrl 0x0 32 RW 0x100 
Boot ROM Hardware Control Register
romcode_ctrl 0x4 32 RW 0x0 
Control Register
romcode_qspi_reset_command 0x8 32 RW 0x0 
QSPI reset command
romcode_initswstate 0xC 32 RW 0x0 
Initial Software State Register
romcode_initswlastld 0x10 32 RW 0x0 
Initial Software Last Image Loaded Register
warmram_enable 0x18 32 RW 0x0 
Enable Register
warmram_datastart 0x1C 32 RW 0x0 
Data Start Register
warmram_length 0x20 32 RW 0x0 
Length Register
warmram_execution 0x24 32 RW 0x0 
Execution Register
warmram_crc 0x28 32 RW 0x0 
Expected CRC Register
isw_handoff 0x30 32 RW 0x0 
Preloader to OS Handoff Information
romcode_bootromswstate 0x50 32 RW 0x0 
Preloader to OS Handoff Information
romcode_stickyset_warmclr 0x70 32 'not specified' 0x0 
Write 1 to set each bit.
Write 0 has no effect.
Clears on warm/cold reset. No other way to clear the value once written 1.
romcode_stickyset_coldclr 0x74 32 'not specified' 0x0 
Write 1 to set each bit.
Write 0 has no effect.
Clears on cold reset. No other way to clear the value once written 1.