ctrl

         The CTRL register is used by software to control reset behavior.It includes fields for software to initiate the cold and warm reset.

Module Instance	Base Address	Register Address
`i_rst_mgr_rstmgr`	`0xFFD05000`	`0xFFD0500C`

Offset: 0xC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`														`swwarmrstreq` `RW 0x0`	`swcoldrstreq` `RW 0x0`

ctrl Fields

Bit	Name	Description	Access	Reset
1	`swwarmrstreq`	This is a one-shot bit written by software to 1 to trigger a hardware sequenced warm reset. It always reads the value 0.	`RW`	`0x0`
0	`swcoldrstreq`	This is a one-shot bit written by software to 1 to trigger a cold reset. It always reads the value 0.	`RW`	`0x0`

Bit

Name

Description

Access

Reset

swwarmrstreq

This is a one-shot bit written by software to 1 to trigger a hardware sequenced warm reset. It always reads the value 0.

RW

0x0

swcoldrstreq

This is a one-shot bit written by software to 1 to trigger a cold reset. It always reads the value 0.

RW

0x0