timer Summary

Module Instance Base Address
i_timer_sp_0_timer 0xFFC02700
i_timer_sp_1_timer 0xFFC02800
Register

Address Offset

Bit Fields
i_timer_sp_0_timer

timer1loadcount

0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timer1loadcount

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timer1loadcount

RW 0x0

timer1currentval

0x4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timer1currentval

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timer1currentval

RO 0x0

timer1controlreg

0x8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1_interrupt_mask

RW 0x0

timer1_mode

RW 0x0

timer1_enable

RW 0x0

timer1eoi

0xC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1eoi

RO 0x0

timer1intstat

0x10

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1intstat

RO 0x0

timersintstat

0xA0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timersintstat

RO 0x0

timerseoi

0xA4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timerseoi

RO 0x0

timersrawintstat

0xA8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timersrawintstat

RO 0x0

timerscompversion

0xAC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timerscompversion

RO 0x3230382A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timerscompversion

RO 0x3230382A

i_timer_sp_1_timer

timer1loadcount

0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timer1loadcount

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timer1loadcount

RW 0x0

timer1currentval

0x4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timer1currentval

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timer1currentval

RO 0x0

timer1controlreg

0x8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1_interrupt_mask

RW 0x0

timer1_mode

RW 0x0

timer1_enable

RW 0x0

timer1eoi

0xC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1eoi

RO 0x0

timer1intstat

0x10

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timer1intstat

RO 0x0

timersintstat

0xA0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timersintstat

RO 0x0

timerseoi

0xA4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timerseoi

RO 0x0

timersrawintstat

0xA8

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

timersrawintstat

RO 0x0

timerscompversion

0xAC

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

timerscompversion

RO 0x3230382A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

timerscompversion

RO 0x3230382A