ic_enable
I2C Enable Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_i2c_0_i2c | 0xFFC02200 | 0xFFC0226C |
| i_i2c_1_i2c | 0xFFC02300 | 0xFFC0236C |
Offset: 0x6C
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
txabort RW 0x0 |
enable RW 0x0 |
|||||||||||||
ic_enable Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 1 | txabort | When set, the controller initiates the transfer abort. 0: ABORT not initiated or ABORT done 1: ABORT operation in progress The software can abort the I2C transfer in master mode by setting this bit. The software can set this bit only when ENABLE is already set; otherwise, the controller ignores any write to ABORT bit. The software cannot clear the ABORT bit once set. In response to an ABORT, the controller issues a STOP and flushes the Tx FIFO after completing the current transfer, then sets the TX_ABORT interrupt after the abort operation. The ABORT bit is cleared automatically after the abort operation. Reset value: 0x0 |
RW | 0x0 | ||||||
| 0 | enable | Controls whether the I2C module is enabled. 0: Disables the I2C module (TX and RX FIFOs are held in an erased state) 1: Enables the I2C module Software can disable the I2C module while it is active. However, it is important that care be taken to ensure that the I2C module is disabled properly. When the I2C module is disabled, the following occurs: - The TX FIFO and RX FIFO get flushed. - Status bits in the IC_INTR_STAT register are still active until the I2C goes into IDLE state. If the module is transmitting, it stops as well as deletes the contents of the transmit buffer after the current transfer is complete. If the module is receiving, the I2C stops the current transfer at the end of the current byte and does not acknowledge the transfer. Reset value: 0x0
|
RW | 0x0 |