diepint3

         Device IN Endpoint 3 Interrupt Register
      
Module Instance Base Address Register Address
i_usbotg_0_devgrp 0xFFB00800 0xFFB00968
i_usbotg_1_devgrp 0xFFB40800 0xFFB40968

Offset: 0x168

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

nyetintrpt

RW 0x0

nakintrpt

RW 0x0

bbleerr

RW 0x0

pktdrpsts

RW 0x0

Reserved

bnaintr

RW 0x0

txfifoundrn

RW 0x0

txfemp

RO 0x1

inepnakeff

RW 0x0

intknepmis

RW 0x0

intkntxfemp

RW 0x0

timeout

RW 0x0

ahberr

RW 0x0

epdisbld

RW 0x0

xfercompl

RW 0x0

diepint3 Fields

Bit Name Description Access Reset
14 nyetintrpt
NYET Interrupt (NYETIntrpt)
The core generates this interrupt when a NYET response is transmitted for a non isochronous OUT endpoint.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
13 nakintrpt
NAK Interrupt (NAKInterrupt)
The core generates this interrupt when a NAK is transmitted or received by the device.
In case of isochronous IN endpoints the interrupt gets generated when a zero length
packet is transmitted due to un-availability of data in the TXFifo.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
12 bbleerr
NAK Interrupt (BbleErr)
The core generates this interrupt when babble is received for the endpoint.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
11 pktdrpsts
Packet Drop Status (PktDrpSts)
This bit indicates to the application that an ISOC OUT packet has been dropped. This
bit does not have an associated mask bit and does not generate an interrupt.
Dependency: This bit is valid in non Scatter/Gather DMA mode when periodic transfer
interrupt feature is selected.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
9 bnaintr
BNA (Buffer Not Available) Interrupt (BNAIntr)
This bit is valid only when Scatter/Gather DMA mode is enabled.
The core generates this interrupt when the descriptor accessed
is not ready For the Core to process, such as Host busy or DMA
done
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
8 txfifoundrn
Fifo Underrun (TxfifoUndrn)
Applies to IN endpoints Only
This bit is valid only If thresholding is enabled. The core generates this interrupt when
it detects a transmit FIFO underrun condition For this endpoint.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
7 txfemp
Transmit FIFO Empty (TxFEmp)
This bit is valid only For IN Endpoints
This interrupt is asserted when the TxFIFO For this endpoint is
either half or completely empty. The half or completely empty
status is determined by the TxFIFO Empty Level bit in the Core
AHB Configuration register (GAHBCFG.NPTxFEmpLvl)).
Value Description
0x0 INACTIVE
0x1 ACTIVE
RO 0x1
6 inepnakeff
IN Endpoint NAK Effective (INEPNakEff)
Applies to periodic IN endpoints only.
This bit can be cleared when the application clears the IN
endpoint NAK by writing to DIEPCTLn.CNAK.
This interrupt indicates that the core has sampled the NAK bit
Set (either by the application or by the core). The interrupt
indicates that the IN endpoint NAK bit Set by the application has
taken effect in the core.
This interrupt does not guarantee that a NAK handshake is sent
on the USB. A STALL bit takes priority over a NAK bit.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
5 intknepmis
IN Token Received with EP Mismatch (INTknEPMis)
Applies to non-periodic IN endpoints only.
Indicates that the data in the top of the non-periodic TxFIFO
belongs to an endpoint other than the one For which the IN token
was received. This interrupt is asserted on the endpoint For
which the IN token was received.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
4 intkntxfemp
IN Token Received When TxFIFO is Empty (INTknTXFEmp)
Applies to non-periodic IN endpoints only.
Indicates that an IN token was received when the associated
TxFIFO (periodic/non-periodic) was empty. This interrupt is
asserted on the endpoint For which the IN token was received.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
3 timeout
Timeout Condition (TimeOUT)
 In shared TX FIFO mode, applies to non-isochronous IN
endpoints only.
 In dedicated FIFO mode, applies only to Control IN
endpoints.
 In Scatter/Gather DMA mode, the TimeOUT interrupt is not
asserted.
Indicates that the core has detected a timeout condition on the
USB For the last IN token on this endpoint.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
2 ahberr
AHB Error (AHBErr)
Applies to IN and OUT endpoints.
This is generated only in Internal DMA mode when there is an
AHB error during an AHB read/write. The application can read
the corresponding endpoint DMA address register to get the
error address.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
1 epdisbld
Endpoint Disabled Interrupt (EPDisbld)
Applies to IN and OUT endpoints.
This bit indicates that the endpoint is disabled per the
application's request.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0
0 xfercompl
Transfer Completed Interrupt (XferCompl)
Applies to IN and OUT endpoints.
 When Scatter/Gather DMA mode is enabled
- For IN endpoint this field indicates that the requested data
from the descriptor is moved from external system memory
to internal FIFO.
- For OUT endpoint this field indicates that the requested
data from the internal FIFO is moved to external system
memory. This interrupt is generated only when the
corresponding endpoint descriptor is closed, and the IOC
bit For the corresponding descriptor is Set.
 When Scatter/Gather DMA mode is disabled, this field
indicates that the programmed transfer is complete on the
AHB as well as on the USB, For this endpoint.
Value Description
0x0 INACTIVE
0x1 ACTIVE
RW 0x0