flashcmd
Module Instance Base Address Register Address
i_qspi_qspiregs 0xFF809000 0xFF809090

Offset: 0x90

Access: RW

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cmdopcode

RW 0x0

enrddata

RW 0x0

numrddatabytes

RW 0x0

encmdaddr

RW 0x0

enmodebit

RW 0x0

numaddrbytes

RW 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

enwrdata

RW 0x0

numwrdatabytes

RW 0x0

numdummybytes

RW 0x0

flash_cmd_cntrl_resv1_fld

RO 0x0

cmdexecstat

RO 0x0

execcmd

WO 0x0

flashcmd Fields

Bit Name Description Access Reset
31:24 cmdopcode 
 The command opcode field should be setup before triggering the command. For example, 0x20 maps to SubSector Erase. Writeing to the execute field (bit 0) of this register launches the command. NOTE : Using this approach to issue commands to the device will make use of the instruction type of the device instruction configuration register. If this field is set to 2'b00, then the command opcode, command address, command dummy bytes and command data will all be transferred in a serial fashion. If this field is set to 2'b01, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0 and DQ1 pins. If this field is set to 2'b10, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0, DQ1, DQ2 and DQ3 pins.
RW 0x0
23 enrddata 
 Set to 1 if the command specified in the command opcode field (bits 31:24) requires read data bytes to be received from the device.
Value Description
0 NOACTION
1 ENABLE
RW 0x0
22:20 numrddatabytes 
 Up to 8 data bytes may be read using this command. Set to 0 for 1 byte and 7 for 8 bytes.
Value Description
0 RDBYTE1
1 RDBYTE2
2 RDBYTE3
3 RDBYTE4
4 RDBYTE5
5 RDBYTE6
6 RDBYTE7
7 RDBYTE8
RW 0x0
19 encmdaddr 
 Set to 1 if the command specified in bits 31:24 requires an address. This should be setup before triggering the command via writing a 1 to the execute field.
Value Description
0 DISABLED
1 ENABLED
RW 0x0
18 enmodebit 
 Set to 1 to ensure the mode bits as defined in the Mode Bit Configuration register are sent following the address bytes.
Value Description
0 DISABLED
1 ENABLED
RW 0x0
17:16 numaddrbytes 
 Set to the number of address bytes required (the address itself is programmed in the FLASH COMMAND ADDRESS REGISTERS). This should be setup before triggering the command via bit 0 of this register. 2'b00 : 1 address byte 2'b01 : 2 address bytes 2'b10 : 3 address bytes 2'b11 : 4 address bytes
Value Description
0 ADDRBYTE1
1 ADDRBYTE2
2 ADDRBYTE3
3 ADDRBYTE4
RW 0x0
15 enwrdata 
 Set to 1 if the command specified in the command opcode field requires write data bytes to be sent to the device.
Value Description
0 NOACTION
1 WRDATABYTES
RW 0x0
14:12 numwrdatabytes 
 Up to 8 Data bytes may be written using this command Set to 0 for 1 byte, 7 for 8 bytes.
Value Description
0 WRBYTE1
1 WRBYTE2
2 WRBYTE3
3 WRBYTE4
4 WRBYTE5
5 WRBYTE6
6 WRBYTE7
7 WRBYTE8
RW 0x0
11:7 numdummybytes 
 Set to the number of dummy bytes required This should be setup before triggering the command via the execute field of this register.
RW 0x0
6:2 flash_cmd_cntrl_resv1_fld 


RO
0x0



1
cmdexecstat

Command execution in progress.


Value
Description



0
NOACTION



1
EXECUTESTAT







RO
0x0



0
execcmd

Execute the command.


Value
Description



0
NOACTION



1
EXECUTE







WO
0x0