gmacgrp_rxfifooverflow

          Register 117 (Receive Frame Count for FIFO Overflow Frames) 

This register maintains the number of received frames missed because of FIFO overflow.
      
Module Instance Base Address Register Address
i_emac_emac0 0xFF800000 0xFF8001D4
i_emac_emac1 0xFF802000 0xFF8021D4
i_emac_emac2 0xFF804000 0xFF8041D4

Offset: 0x1D4

Access: RO

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cnt

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cnt

RO 0x0

gmacgrp_rxfifooverflow Fields

Bit Name Description Access Reset
31:0 cnt
This field indicates the  number of received frames missed because of FIFO overflow.
RO 0x0